diff mbox series

[i-g-t,08/10] lib: Use unsigned gen for forward compatible tests

Message ID 20201014104038.2554985-8-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series [i-g-t,01/10] i915/gem_userptr_blits: Tighten has_userptr() | expand

Commit Message

Chris Wilson Oct. 14, 2020, 10:40 a.m. UTC 
Unknown, so future, gen are marked as -1 which we want to treat as -1u
so that always pass >= gen checks.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2298
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/intel_batchbuffer.c | 10 +++++-----
 lib/intel_batchbuffer.h | 10 ++++++----
 2 files changed, 11 insertions(+), 9 deletions(-)

Comments

Zbigniew Kempczyński Oct. 15, 2020, 4:58 a.m. UTC | #1 
On Wed, Oct 14, 2020 at 11:40:36AM +0100, Chris Wilson wrote:
> Unknown, so future, gen are marked as -1 which we want to treat as -1u
> so that always pass >= gen checks.

We've discussed this some time ago. I was previously to 'no' but you've
realized me we can avoid a lot of failures on likely working tests because
they will fail on gen check where's real reason is lack of platform entry
(then focus on those which will fail).

So, I see no problem with that:

Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2298
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/intel_batchbuffer.c | 10 +++++-----
>  lib/intel_batchbuffer.h | 10 ++++++----
>  2 files changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 60dbfe261..fc73495c0 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -414,7 +414,7 @@ intel_blt_copy(struct intel_batchbuffer *batch,
>  	       drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch,
>  	       int width, int height, int bpp)
>  {
> -	const int gen = batch->gen;
> +	const unsigned int gen = batch->gen;
>  	uint32_t src_tiling, dst_tiling, swizzle;
>  	uint32_t cmd_bits = 0;
>  	uint32_t br13_bits;
> @@ -553,7 +553,7 @@ unsigned igt_buf_height(const struct igt_buf *buf)
>   * Returns:
>   * The width of the ccs buffer data.
>   */
> -unsigned int igt_buf_intel_ccs_width(int gen, const struct igt_buf *buf)
> +unsigned int igt_buf_intel_ccs_width(unsigned int gen, const struct igt_buf *buf)
>  {
>  	/*
>  	 * GEN12+: The CCS unit size is 64 bytes mapping 4 main surface
> @@ -576,7 +576,7 @@ unsigned int igt_buf_intel_ccs_width(int gen, const struct igt_buf *buf)
>   * Returns:
>   * The height of the ccs buffer data.
>   */
> -unsigned int igt_buf_intel_ccs_height(int gen, const struct igt_buf *buf)
> +unsigned int igt_buf_intel_ccs_height(unsigned int gen, const struct igt_buf *buf)
>  {
>  	/*
>  	 * GEN12+: The CCS unit size is 64 bytes mapping 4 main surface
> @@ -703,7 +703,7 @@ fill_object(struct drm_i915_gem_exec_object2 *obj, uint32_t gem_handle,
>  
>  static void exec_blit(int fd,
>  		      struct drm_i915_gem_exec_object2 *objs, uint32_t count,
> -		      int gen)
> +		      unsigned int gen)
>  {
>  	struct drm_i915_gem_execbuffer2 exec = {
>  		.buffers_ptr = to_user_pointer(objs),
> @@ -2416,7 +2416,7 @@ void intel_bb_emit_blt_copy(struct intel_bb *ibb,
>  			    int dst_x1, int dst_y1, int dst_pitch,
>  			    int width, int height, int bpp)
>  {
> -	const int gen = ibb->gen;
> +	const unsigned int gen = ibb->gen;
>  	uint32_t cmd_bits = 0;
>  	uint32_t br13_bits;
>  	uint32_t mask;
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index d20b4e66a..ab1b0c286 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -15,7 +15,7 @@
>  struct intel_batchbuffer {
>  	drm_intel_bufmgr *bufmgr;
>  	uint32_t devid;
> -	int gen;
> +	unsigned int gen;
>  
>  	drm_intel_context *ctx;
>  	drm_intel_bo *bo;
> @@ -263,8 +263,10 @@ static inline bool igt_buf_compressed(const struct igt_buf *buf)
>  
>  unsigned igt_buf_width(const struct igt_buf *buf);
>  unsigned igt_buf_height(const struct igt_buf *buf);
> -unsigned int igt_buf_intel_ccs_width(int gen, const struct igt_buf *buf);
> -unsigned int igt_buf_intel_ccs_height(int gen, const struct igt_buf *buf);
> +unsigned int igt_buf_intel_ccs_width(unsigned int gen,
> +				     const struct igt_buf *buf);
> +unsigned int igt_buf_intel_ccs_height(unsigned int gen,
> +				      const struct igt_buf *buf);
>  
>  void igt_blitter_src_copy(int fd,
>  			  /* src */
> @@ -434,7 +436,7 @@ igt_media_spinfunc_t igt_get_media_spinfunc(int devid);
>   */
>  struct intel_bb {
>  	int i915;
> -	int gen;
> +	unsigned int gen;
>  	bool debug;
>  	bool dump_base64;
>  	bool enforce_relocs;
> -- 
> 2.28.0
>
diff mbox series

Patch

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 60dbfe261..fc73495c0 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -414,7 +414,7 @@  intel_blt_copy(struct intel_batchbuffer *batch,
 	       drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch,
 	       int width, int height, int bpp)
 {
-	const int gen = batch->gen;
+	const unsigned int gen = batch->gen;
 	uint32_t src_tiling, dst_tiling, swizzle;
 	uint32_t cmd_bits = 0;
 	uint32_t br13_bits;
@@ -553,7 +553,7 @@  unsigned igt_buf_height(const struct igt_buf *buf)
  * Returns:
  * The width of the ccs buffer data.
  */
-unsigned int igt_buf_intel_ccs_width(int gen, const struct igt_buf *buf)
+unsigned int igt_buf_intel_ccs_width(unsigned int gen, const struct igt_buf *buf)
 {
 	/*
 	 * GEN12+: The CCS unit size is 64 bytes mapping 4 main surface
@@ -576,7 +576,7 @@  unsigned int igt_buf_intel_ccs_width(int gen, const struct igt_buf *buf)
  * Returns:
  * The height of the ccs buffer data.
  */
-unsigned int igt_buf_intel_ccs_height(int gen, const struct igt_buf *buf)
+unsigned int igt_buf_intel_ccs_height(unsigned int gen, const struct igt_buf *buf)
 {
 	/*
 	 * GEN12+: The CCS unit size is 64 bytes mapping 4 main surface
@@ -703,7 +703,7 @@  fill_object(struct drm_i915_gem_exec_object2 *obj, uint32_t gem_handle,
 
 static void exec_blit(int fd,
 		      struct drm_i915_gem_exec_object2 *objs, uint32_t count,
-		      int gen)
+		      unsigned int gen)
 {
 	struct drm_i915_gem_execbuffer2 exec = {
 		.buffers_ptr = to_user_pointer(objs),
@@ -2416,7 +2416,7 @@  void intel_bb_emit_blt_copy(struct intel_bb *ibb,
 			    int dst_x1, int dst_y1, int dst_pitch,
 			    int width, int height, int bpp)
 {
-	const int gen = ibb->gen;
+	const unsigned int gen = ibb->gen;
 	uint32_t cmd_bits = 0;
 	uint32_t br13_bits;
 	uint32_t mask;
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index d20b4e66a..ab1b0c286 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -15,7 +15,7 @@ 
 struct intel_batchbuffer {
 	drm_intel_bufmgr *bufmgr;
 	uint32_t devid;
-	int gen;
+	unsigned int gen;
 
 	drm_intel_context *ctx;
 	drm_intel_bo *bo;
@@ -263,8 +263,10 @@  static inline bool igt_buf_compressed(const struct igt_buf *buf)
 
 unsigned igt_buf_width(const struct igt_buf *buf);
 unsigned igt_buf_height(const struct igt_buf *buf);
-unsigned int igt_buf_intel_ccs_width(int gen, const struct igt_buf *buf);
-unsigned int igt_buf_intel_ccs_height(int gen, const struct igt_buf *buf);
+unsigned int igt_buf_intel_ccs_width(unsigned int gen,
+				     const struct igt_buf *buf);
+unsigned int igt_buf_intel_ccs_height(unsigned int gen,
+				      const struct igt_buf *buf);
 
 void igt_blitter_src_copy(int fd,
 			  /* src */
@@ -434,7 +436,7 @@  igt_media_spinfunc_t igt_get_media_spinfunc(int devid);
  */
 struct intel_bb {
 	int i915;
-	int gen;
+	unsigned int gen;
 	bool debug;
 	bool dump_base64;
 	bool enforce_relocs;