From patchwork Wed Oct 21 13:32:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Aditya Swarup X-Patchwork-Id: 11849153 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A880C61DD8 for ; Wed, 21 Oct 2020 13:32:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A4462080A for ; Wed, 21 Oct 2020 13:32:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1A4462080A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 659976EB22; Wed, 21 Oct 2020 13:32:41 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 36D176EB22 for ; Wed, 21 Oct 2020 13:32:39 +0000 (UTC) IronPort-SDR: HxE3wcfbF4LZYIr9Io5FFQNlPRZKcQWDuRoSF9h1AUoI/Fx5B00T4iYRmnHfxnsfY5Y5aQQRF9 XMq41Bm+dZxg== X-IronPort-AV: E=McAfee;i="6000,8403,9780"; a="154317793" X-IronPort-AV: E=Sophos;i="5.77,401,1596524400"; d="scan'208";a="154317793" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2020 06:32:39 -0700 IronPort-SDR: PNpQNqk8vAvgSmc/+D18wQRB8HFfI0ZGX9btPhshsLcBPnXGQraUNi482s7LK3jMAU7d7Jun8P WcutnPNEUIwA== X-IronPort-AV: E=Sophos;i="5.77,401,1596524400"; d="scan'208";a="316372557" Received: from snadathu-mobl.amr.corp.intel.com (HELO aswarup-mobl.amr.corp.intel.com) ([10.252.137.153]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2020 06:32:38 -0700 From: Aditya Swarup To: intel-gfx@lists.freedesktop.org Date: Wed, 21 Oct 2020 06:32:08 -0700 Message-Id: <20201021133213.328994-14-aditya.swarup@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201021133213.328994-1-aditya.swarup@intel.com> References: <20201021133213.328994-1-aditya.swarup@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 13/18] drm/i915/adl_s: Add display, gt, ctx and ADL-S whitelist WA X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Anusha Srivatsa - Inherit the gen12 workarounds. - Add placeholders to setup GT WA. - Extend permanent driver WA Wa_1409767108 to adl-s and Wa_14010685332 to adl-s. - Extend permanent driver WA Wa_1606054188 to adl-s - Add Wa_14011765242 for adl-s A0 stepping. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Imre Deak Cc: Matt Roper Cc: Lucas De Marchi Cc: Anusha Srivatsa Signed-off-by: Aditya Swarup --- .../drm/i915/display/intel_display_power.c | 7 +++-- drivers/gpu/drm/i915/display/intel_sprite.c | 2 +- drivers/gpu/drm/i915/gt/intel_workarounds.c | 29 +++++++++++++++++-- drivers/gpu/drm/i915/i915_irq.c | 2 +- drivers/gpu/drm/i915/intel_device_info.c | 6 +++- 5 files changed, 37 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 689922480661..acc63ab2bc78 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -5288,9 +5288,10 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv) unsigned long abox_mask = INTEL_INFO(dev_priv)->abox_mask; int config, i; - if (IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) || + if (IS_ALDERLAKE_S(dev_priv) || + IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) || IS_TGL_DISP_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_B0)) - /* Wa_1409767108:tgl,dg1 */ + /* Wa_1409767108:tgl,dg1,adl-s */ table = wa_1409767108_buddy_page_masks; else table = tgl_buddy_page_masks; @@ -5328,7 +5329,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); - /* Wa_14011294188:ehl,jsl,tgl,rkl */ + /* Wa_14011294188:ehl,jsl,tgl,rkl,adl-s */ if (INTEL_PCH_TYPE(dev_priv) >= PCH_JSP && INTEL_PCH_TYPE(dev_priv) < PCH_DG1) intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, 0, diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index 88bfebdf9228..d4b5fc9e2704 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -2226,7 +2226,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, } /* Wa_1606054188:tgl */ - if (IS_TIGERLAKE(dev_priv) && + if ((IS_TIGERLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv)) && plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE && intel_format_is_p01x(fb->format->format)) { drm_dbg_kms(&dev_priv->drm, diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index fed9503a7c4e..8136d13462b5 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -686,6 +686,12 @@ static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine, DG1_HZ_READ_SUPPRESSION_OPTIMIZATION_DISABLE); } +static void adls_ctx_workarounds_init(struct intel_engine_cs *engine, + struct i915_wa_list *wal) +{ + gen12_ctx_workarounds_init(engine, wal); +} + static void __intel_engine_init_ctx_wa(struct intel_engine_cs *engine, struct i915_wa_list *wal, @@ -698,7 +704,9 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine, wa_init_start(wal, name, engine->name); - if (IS_DG1(i915)) + if (IS_ALDERLAKE_S(i915)) + adls_ctx_workarounds_init(engine, wal); + else if (IS_DG1(i915)) dg1_ctx_workarounds_init(engine, wal); else if (IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) tgl_ctx_workarounds_init(engine, wal); @@ -1284,10 +1292,18 @@ dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) VSUNIT_CLKGATE_DIS_TGL); } +static void +adls_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) +{ + gen12_gt_workarounds_init(i915, wal); +} + static void gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal) { - if (IS_DG1(i915)) + if (IS_ALDERLAKE_S(i915)) + adls_gt_workarounds_init(i915, wal); + else if (IS_DG1(i915)) dg1_gt_workarounds_init(i915, wal); else if (IS_TIGERLAKE(i915)) tgl_gt_workarounds_init(i915, wal); @@ -1668,6 +1684,11 @@ static void dg1_whitelist_build(struct intel_engine_cs *engine) RING_FORCE_TO_NONPRIV_ACCESS_RD); } +static void adls_whitelist_build(struct intel_engine_cs *engine) +{ + tgl_whitelist_build(engine); +} + void intel_engine_init_whitelist(struct intel_engine_cs *engine) { struct drm_i915_private *i915 = engine->i915; @@ -1675,7 +1696,9 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine) wa_init_start(w, "whitelist", engine->name); - if (IS_DG1(i915)) + if (IS_ALDERLAKE_S(i915)) + adls_whitelist_build(engine); + else if (IS_DG1(i915)) dg1_whitelist_build(engine); else if (IS_GEN(i915, 12)) tgl_whitelist_build(engine); diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 9033221995ad..32cb12c4b6dd 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3045,7 +3045,7 @@ static void gen11_display_irq_reset(struct drm_i915_private *dev_priv) if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) GEN3_IRQ_RESET(uncore, SDE); - /* Wa_14010685332:icl,jsl,ehl,tgl,rkl */ + /* Wa_14010685332:icl,jsl,ehl,tgl,rkl,adl-s A0 */ if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { intel_uncore_rmw(uncore, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS); diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 7310e019c611..4fffa8295d06 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -394,7 +394,11 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv); enum pipe pipe; - if (INTEL_GEN(dev_priv) >= 10) { + /* Wa_14011765242: adl-s A0 */ + if (IS_ADLS_REVID(dev_priv, ADLS_REVID_A0, ADLS_REVID_A0)) + for_each_pipe(dev_priv, pipe) + runtime->num_scalers[pipe] = 0; + else if (INTEL_GEN(dev_priv) >= 10) { for_each_pipe(dev_priv, pipe) runtime->num_scalers[pipe] = 2; } else if (IS_GEN(dev_priv, 9)) {