From patchwork Wed Oct 21 13:32:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Aditya Swarup X-Patchwork-Id: 11849127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1BEDC55178 for ; Wed, 21 Oct 2020 13:32:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9798F2080A for ; Wed, 21 Oct 2020 13:32:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9798F2080A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C6A636EB1C; Wed, 21 Oct 2020 13:32:32 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2F5C96EB14 for ; Wed, 21 Oct 2020 13:32:31 +0000 (UTC) IronPort-SDR: 5MibyqNc88yjvoF8nE1wgaJnAvxLvZWV8YDz5Muq3kWS04Yi+G15GfkBbLoWedMeXn/52ZlfYI JkiCsNvBXUtA== X-IronPort-AV: E=McAfee;i="6000,8403,9780"; a="154317764" X-IronPort-AV: E=Sophos;i="5.77,401,1596524400"; d="scan'208";a="154317764" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2020 06:32:31 -0700 IronPort-SDR: JGqGgLS7k/THhkIw7nC7LHKz6UHhmVbTCtooGr0m4BxymTD0kpLW09udqIJ1Vm8cTYPVc+UUxV 0J1c7n4MsGfA== X-IronPort-AV: E=Sophos;i="5.77,401,1596524400"; d="scan'208";a="316372484" Received: from snadathu-mobl.amr.corp.intel.com (HELO aswarup-mobl.amr.corp.intel.com) ([10.252.137.153]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2020 06:32:30 -0700 From: Aditya Swarup To: intel-gfx@lists.freedesktop.org Date: Wed, 21 Oct 2020 06:32:00 -0700 Message-Id: <20201021133213.328994-6-aditya.swarup@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201021133213.328994-1-aditya.swarup@intel.com> References: <20201021133213.328994-1-aditya.swarup@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 05/18] drm/i915/adl_s: Add PHYs for Alderlake S X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Anusha Srivatsa Alderlake-S has 5 combo phys, add reg definitions for combo phys and update the port to phy helper for ADL-S. Cc: Lucas De Marchi Cc: Jani Nikula Cc: Ville Syrjälä Cc: Imre Deak Cc: Matt Roper Signed-off-by: Anusha Srivatsa Signed-off-by: Aditya Swarup Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_display.c | 8 ++++++-- drivers/gpu/drm/i915/i915_reg.h | 5 ++++- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 60bacdbe7f92..70ca5d2e5b0a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7333,6 +7333,8 @@ bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy) { if (phy == PHY_NONE) return false; + else if (IS_ALDERLAKE_S(dev_priv)) + return phy <= PHY_E; else if (IS_ROCKETLAKE(dev_priv)) return phy <= PHY_D; else if (IS_JSL_EHL(dev_priv)) @@ -7345,7 +7347,7 @@ bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy) bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy) { - if (IS_ROCKETLAKE(dev_priv)) + if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv)) return false; else if (INTEL_GEN(dev_priv) >= 12) return phy >= PHY_D && phy <= PHY_I; @@ -7357,7 +7359,9 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy) enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port) { - if (IS_ROCKETLAKE(i915) && port >= PORT_D) + if (IS_ALDERLAKE_S(i915) && port >= PORT_D) + return (enum phy)port - 2; + else if (IS_ROCKETLAKE(i915) && port >= PORT_D) return (enum phy)port - 1; else if (IS_JSL_EHL(i915) && port == PORT_D) return PHY_A; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f6b844ca7a9f..85c5e4fb3e7c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1870,10 +1870,13 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define _ICL_COMBOPHY_B 0x6C000 #define _EHL_COMBOPHY_C 0x160000 #define _RKL_COMBOPHY_D 0x161000 +#define _ADL_COMBOPHY_E 0x16B000 + #define _ICL_COMBOPHY(phy) _PICK(phy, _ICL_COMBOPHY_A, \ _ICL_COMBOPHY_B, \ _EHL_COMBOPHY_C, \ - _RKL_COMBOPHY_D) + _RKL_COMBOPHY_D, \ + _ADL_COMBOPHY_E) /* CNL/ICL Port CL_DW registers */ #define _ICL_PORT_CL_DW(dw, phy) (_ICL_COMBOPHY(phy) + \