diff mbox series

drm/i915: Reset the interrupt mask on disabling interrupts

Message ID 20201022114246.28566-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series drm/i915: Reset the interrupt mask on disabling interrupts | expand

Commit Message

Chris Wilson Oct. 22, 2020, 11:42 a.m. UTC 
As we disable the interrupt during suspend, also reset the irq_mask to
short-circuit subsystems that later try to turn off their interrupt
source.

<4>[  101.816730] i915 0000:00:02.0: drm_WARN_ON(!intel_irqs_enabled(dev_priv))
<4>[  101.816853] WARNING: CPU: 3 PID: 4241 at drivers/gpu/drm/i915/i915_irq.c:343 ilk_update_display_irq+0xb3/0x130 [i915]

v2: Reset irq_mask for i8xx_irq_reset as well, and split patch to focus
on only i915->irq_mask

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

Comments

Ville Syrjala Oct. 22, 2020, 5:33 p.m. UTC | #1 
On Thu, Oct 22, 2020 at 12:42:46PM +0100, Chris Wilson wrote:
> As we disable the interrupt during suspend, also reset the irq_mask to
> short-circuit subsystems that later try to turn off their interrupt
> source.
> 
> <4>[  101.816730] i915 0000:00:02.0: drm_WARN_ON(!intel_irqs_enabled(dev_priv))
> <4>[  101.816853] WARNING: CPU: 3 PID: 4241 at drivers/gpu/drm/i915/i915_irq.c:343 ilk_update_display_irq+0xb3/0x130 [i915]
> 
> v2: Reset irq_mask for i8xx_irq_reset as well, and split patch to focus
> on only i915->irq_mask
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 09221ca1ffb2..53e67c796d09 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -337,17 +337,14 @@ void ilk_update_display_irq(struct drm_i915_private *dev_priv,
>  	u32 new_val;
>  
>  	lockdep_assert_held(&dev_priv->irq_lock);
> -
>  	drm_WARN_ON(&dev_priv->drm, enabled_irq_mask & ~interrupt_mask);
>  
> -	if (drm_WARN_ON(&dev_priv->drm, !intel_irqs_enabled(dev_priv)))
> -		return;
> -
>  	new_val = dev_priv->irq_mask;
>  	new_val &= ~interrupt_mask;
>  	new_val |= (~enabled_irq_mask & interrupt_mask);
>  
> -	if (new_val != dev_priv->irq_mask) {
> +	if (new_val != dev_priv->irq_mask &&
> +	    !drm_WARN_ON(&dev_priv->drm, !intel_irqs_enabled(dev_priv))) {
>  		dev_priv->irq_mask = new_val;
>  		I915_WRITE(DEIMR, dev_priv->irq_mask);
>  		POSTING_READ(DEIMR);
> @@ -2951,6 +2948,8 @@ static void ilk_irq_reset(struct drm_i915_private *dev_priv)
>  	struct intel_uncore *uncore = &dev_priv->uncore;
>  
>  	GEN3_IRQ_RESET(uncore, DE);
> +	dev_priv->irq_mask = ~0u;
> +
>  	if (IS_GEN(dev_priv, 7))
>  		intel_uncore_write(uncore, GEN7_ERR_INT, 0xffffffff);
>  
> @@ -3695,6 +3694,7 @@ static void i8xx_irq_reset(struct drm_i915_private *dev_priv)
>  	i9xx_pipestat_irq_reset(dev_priv);
>  
>  	GEN2_IRQ_RESET(uncore);
> +	dev_priv->irq_mask = ~0u;
>  }
>  
>  static void i8xx_irq_postinstall(struct drm_i915_private *dev_priv)
> @@ -3864,6 +3864,7 @@ static void i915_irq_reset(struct drm_i915_private *dev_priv)
>  	i9xx_pipestat_irq_reset(dev_priv);
>  
>  	GEN3_IRQ_RESET(uncore, GEN2_);
> +	dev_priv->irq_mask = ~0u;
>  }
>  
>  static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
> @@ -3970,6 +3971,7 @@ static void i965_irq_reset(struct drm_i915_private *dev_priv)
>  	i9xx_pipestat_irq_reset(dev_priv);
>  
>  	GEN3_IRQ_RESET(uncore, GEN2_);
> +	dev_priv->irq_mask = ~0u;
>  }
>  
>  static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
> -- 
> 2.20.1
Chris Wilson Oct. 22, 2020, 6:48 p.m. UTC | #2 
Quoting Ville Syrjälä (2020-10-22 18:33:43)
> On Thu, Oct 22, 2020 at 12:42:46PM +0100, Chris Wilson wrote:
> > As we disable the interrupt during suspend, also reset the irq_mask to
> > short-circuit subsystems that later try to turn off their interrupt
> > source.
> > 
> > <4>[  101.816730] i915 0000:00:02.0: drm_WARN_ON(!intel_irqs_enabled(dev_priv))
> > <4>[  101.816853] WARNING: CPU: 3 PID: 4241 at drivers/gpu/drm/i915/i915_irq.c:343 ilk_update_display_irq+0xb3/0x130 [i915]
> > 
> > v2: Reset irq_mask for i8xx_irq_reset as well, and split patch to focus
> > on only i915->irq_mask
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

And fingers crossed for fi-ilk-m making a speedy recovery.
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 09221ca1ffb2..53e67c796d09 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -337,17 +337,14 @@  void ilk_update_display_irq(struct drm_i915_private *dev_priv,
 	u32 new_val;
 
 	lockdep_assert_held(&dev_priv->irq_lock);
-
 	drm_WARN_ON(&dev_priv->drm, enabled_irq_mask & ~interrupt_mask);
 
-	if (drm_WARN_ON(&dev_priv->drm, !intel_irqs_enabled(dev_priv)))
-		return;
-
 	new_val = dev_priv->irq_mask;
 	new_val &= ~interrupt_mask;
 	new_val |= (~enabled_irq_mask & interrupt_mask);
 
-	if (new_val != dev_priv->irq_mask) {
+	if (new_val != dev_priv->irq_mask &&
+	    !drm_WARN_ON(&dev_priv->drm, !intel_irqs_enabled(dev_priv))) {
 		dev_priv->irq_mask = new_val;
 		I915_WRITE(DEIMR, dev_priv->irq_mask);
 		POSTING_READ(DEIMR);
@@ -2951,6 +2948,8 @@  static void ilk_irq_reset(struct drm_i915_private *dev_priv)
 	struct intel_uncore *uncore = &dev_priv->uncore;
 
 	GEN3_IRQ_RESET(uncore, DE);
+	dev_priv->irq_mask = ~0u;
+
 	if (IS_GEN(dev_priv, 7))
 		intel_uncore_write(uncore, GEN7_ERR_INT, 0xffffffff);
 
@@ -3695,6 +3694,7 @@  static void i8xx_irq_reset(struct drm_i915_private *dev_priv)
 	i9xx_pipestat_irq_reset(dev_priv);
 
 	GEN2_IRQ_RESET(uncore);
+	dev_priv->irq_mask = ~0u;
 }
 
 static void i8xx_irq_postinstall(struct drm_i915_private *dev_priv)
@@ -3864,6 +3864,7 @@  static void i915_irq_reset(struct drm_i915_private *dev_priv)
 	i9xx_pipestat_irq_reset(dev_priv);
 
 	GEN3_IRQ_RESET(uncore, GEN2_);
+	dev_priv->irq_mask = ~0u;
 }
 
 static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
@@ -3970,6 +3971,7 @@  static void i965_irq_reset(struct drm_i915_private *dev_priv)
 	i9xx_pipestat_irq_reset(dev_priv);
 
 	GEN3_IRQ_RESET(uncore, GEN2_);
+	dev_priv->irq_mask = ~0u;
 }
 
 static void i965_irq_postinstall(struct drm_i915_private *dev_priv)