From patchwork Fri Oct 23 13:34:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11853507 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4D03C4363A for ; Fri, 23 Oct 2020 13:35:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 67151208E4 for ; Fri, 23 Oct 2020 13:35:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 67151208E4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DFA576F882; Fri, 23 Oct 2020 13:35:12 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id DE38F6F882 for ; Fri, 23 Oct 2020 13:35:11 +0000 (UTC) IronPort-SDR: LXfNhurhikCw45wtyTwGz254K3Rl6Nu3WOSbeqC0Kva9s+0LWZMHFcVl/d/EerkLePJayYNvpc aSa0urc0GRTg== X-IronPort-AV: E=McAfee;i="6000,8403,9782"; a="229310626" X-IronPort-AV: E=Sophos;i="5.77,408,1596524400"; d="scan'208";a="229310626" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 06:35:11 -0700 IronPort-SDR: +MHuCmO6gbU4ZnB/yJIwv+T2qVStUAfD6rqLoJWnjPD+/ezgJ7xPPCuAlXNKoLdpYrkOOOxbwm zIR23QROBS3g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,408,1596524400"; d="scan'208";a="302671227" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga008.fm.intel.com with SMTP; 23 Oct 2020 06:35:09 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 23 Oct 2020 16:35:08 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Fri, 23 Oct 2020 16:34:15 +0300 Message-Id: <20201023133420.12039-15-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201023133420.12039-1-ville.syrjala@linux.intel.com> References: <20201023133420.12039-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 14/19] drm/i915: Don't enable hpd detection logic from irq_postinstall() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä No reason that I can see why we should enable the hpd detection logic already during irq postinstall phase. We don't even do this on all the platforms. We just need it before we actually enable the hotplug interrupts in .hpd_irq_setup(), and in fact we already do it there as well. Let's just eliminate the redundant early setup. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_irq.c | 38 +++------------------------------ 1 file changed, 3 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 2c8813f34a45..b1f21502b78b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3377,8 +3377,8 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv) ibx_hpd_irq_setup(dev_priv); } -static void __bxt_hpd_detection_setup(struct drm_i915_private *dev_priv, - u32 enabled_irqs) +static void bxt_hpd_detection_setup(struct drm_i915_private *dev_priv, + u32 enabled_irqs) { u32 hotplug; @@ -3409,11 +3409,6 @@ static void __bxt_hpd_detection_setup(struct drm_i915_private *dev_priv, I915_WRITE(PCH_PORT_HOTPLUG, hotplug); } -static void bxt_hpd_detection_setup(struct drm_i915_private *dev_priv) -{ - __bxt_hpd_detection_setup(dev_priv, BXT_DE_PORT_HOTPLUG_MASK); -} - static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_irqs, enabled_irqs; @@ -3423,7 +3418,7 @@ static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv) bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs); - __bxt_hpd_detection_setup(dev_priv, enabled_irqs); + bxt_hpd_detection_setup(dev_priv, enabled_irqs); } static void ibx_irq_postinstall(struct drm_i915_private *dev_priv) @@ -3442,12 +3437,6 @@ static void ibx_irq_postinstall(struct drm_i915_private *dev_priv) gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR); I915_WRITE(SDEIMR, ~mask); - - if (HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv) || - HAS_PCH_LPT(dev_priv)) - ibx_hpd_detection_setup(dev_priv); - else - spt_hpd_detection_setup(dev_priv); } static void ilk_irq_postinstall(struct drm_i915_private *dev_priv) @@ -3487,8 +3476,6 @@ static void ilk_irq_postinstall(struct drm_i915_private *dev_priv) GEN3_IRQ_INIT(uncore, DE, dev_priv->irq_mask, display_mask | extra_mask); - ilk_hpd_detection_setup(dev_priv); - ibx_irq_postinstall(dev_priv); } @@ -3609,12 +3596,6 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) GEN3_IRQ_INIT(uncore, GEN11_DE_HPD_, ~de_hpd_masked, de_hpd_enables); - gen11_tc_hpd_detection_setup(dev_priv); - gen11_tbt_hpd_detection_setup(dev_priv); - } else if (IS_GEN9_LP(dev_priv)) { - bxt_hpd_detection_setup(dev_priv); - } else if (IS_BROADWELL(dev_priv)) { - ilk_hpd_detection_setup(dev_priv); } } @@ -3642,19 +3623,6 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv) gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR); I915_WRITE(SDEIMR, ~mask); - - if (HAS_PCH_TGP(dev_priv)) { - icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK); - icp_tc_hpd_detection_setup(dev_priv, TGP_TC_HPD_ENABLE_MASK); - } else if (HAS_PCH_JSP(dev_priv)) { - icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK); - } else if (HAS_PCH_MCC(dev_priv)) { - icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK); - icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE(HPD_PORT_TC1)); - } else { - icp_ddi_hpd_detection_setup(dev_priv, ICP_DDI_HPD_ENABLE_MASK); - icp_tc_hpd_detection_setup(dev_priv, ICP_TC_HPD_ENABLE_MASK); - } } static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)