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drm/i915/gt: Start timeline with a wrap

Message ID 20201027142803.3940-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series drm/i915/gt: Start timeline with a wrap | expand

Commit Message

Chris Wilson Oct. 27, 2020, 2:28 p.m. UTC 
Once upon a time we used to do this by default, back when it was a
global seqno with a global barrier on wrap. Since the switch of
per-client timelines, handling the wrap is cheaper and yet more
complicated, and so worth encouraging early wraps once more.

Suggested-by: Thomas Hellström <thomas.hellstrom@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Thomas Hellström <thomas.hellstrom@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_timeline.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 7ea94d201fe6..f0bb1c03b488 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -263,6 +263,9 @@  static int intel_timeline_init(struct intel_timeline *timeline,
 	timeline->hwsp_ggtt = i915_vma_get(hwsp);
 	GEM_BUG_ON(timeline->hwsp_offset >= hwsp->size);
 
+	if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
+		timeline->seqno = -10u; /* wrap after a few requests */
+
 	timeline->fence_context = dma_fence_context_alloc(1);
 
 	mutex_init(&timeline->mutex);