From patchwork Tue Oct 27 20:39:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11861857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1328FC4363A for ; Tue, 27 Oct 2020 20:40:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7716E20725 for ; Tue, 27 Oct 2020 20:40:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7716E20725 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ECEEF6EC44; Tue, 27 Oct 2020 20:40:06 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6CF826EC45 for ; Tue, 27 Oct 2020 20:40:04 +0000 (UTC) IronPort-SDR: UeB6fl1hLOu+BI4PfTc3iFlAoQM4MesmCREy76Eu4VLB4r5mQ/bfNvwSvAl5ys9iphhiFZuVv0 xXwCzTLt74hA== X-IronPort-AV: E=McAfee;i="6000,8403,9787"; a="252859366" X-IronPort-AV: E=Sophos;i="5.77,424,1596524400"; d="scan'208";a="252859366" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2020 13:40:04 -0700 IronPort-SDR: nvJVi0jbW+XWxoiW/xURRhfxqrGa/FBTI1KmEmVTqbzHsTwT1rwPhVLsJRoOuiX/zsrIuOv105 Xu2N8x8gAYTA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,424,1596524400"; d="scan'208";a="303883347" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga008.fm.intel.com with SMTP; 27 Oct 2020 13:40:02 -0700 Received: by stinkbox (sSMTP sendmail emulation); Tue, 27 Oct 2020 22:40:01 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 27 Oct 2020 22:39:49 +0200 Message-Id: <20201027203955.28032-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201027203955.28032-1-ville.syrjala@linux.intel.com> References: <20201027203955.28032-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/8] drm/i915: Pass the crtc to skl_compute_dbuf_slices() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä skl_compute_dbuf_slices() has no use for the crtc state, so just pass the crtc itself. Reviewed-by: Stanislav Lisovskiy Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d14cdedc4ac3..260d3cf24db3 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4103,7 +4103,7 @@ static unsigned int intel_crtc_ddb_weight(const struct intel_crtc_state *crtc_st return hdisplay; } -static u8 skl_compute_dbuf_slices(const struct intel_crtc_state *crtc_state, +static u8 skl_compute_dbuf_slices(struct intel_crtc *crtc, u8 active_pipes); static int @@ -4115,10 +4115,10 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv, { struct drm_atomic_state *state = crtc_state->uapi.state; struct intel_atomic_state *intel_state = to_intel_atomic_state(state); - struct drm_crtc *for_crtc = crtc_state->uapi.crtc; - const struct intel_crtc *crtc; + struct intel_crtc *for_crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct intel_crtc *crtc; unsigned int pipe_weight = 0, total_weight = 0, weight_before_pipe = 0; - enum pipe for_pipe = to_intel_crtc(for_crtc)->pipe; + enum pipe for_pipe = for_crtc->pipe; struct intel_dbuf_state *new_dbuf_state = intel_atomic_get_new_dbuf_state(intel_state); const struct intel_dbuf_state *old_dbuf_state = @@ -4162,14 +4162,14 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv, * * FIXME get rid of this mess */ - *alloc = to_intel_crtc_state(for_crtc->state)->wm.skl.ddb; + *alloc = to_intel_crtc_state(for_crtc->base.state)->wm.skl.ddb; return 0; } /* * Get allowed DBuf slices for correspondent pipe and platform. */ - dbuf_slice_mask = skl_compute_dbuf_slices(crtc_state, active_pipes); + dbuf_slice_mask = skl_compute_dbuf_slices(for_crtc, active_pipes); /* * Figure out at which DBuf slice we start, i.e if we start at Dbuf S2 @@ -4195,8 +4195,8 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv, if (!crtc_state->hw.active) continue; - pipe_dbuf_slice_mask = skl_compute_dbuf_slices(crtc_state, - active_pipes); + pipe_dbuf_slice_mask = + skl_compute_dbuf_slices(crtc, active_pipes); /* * According to BSpec pipe can share one dbuf slice with another @@ -4246,7 +4246,7 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv, drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s] dbuf slices 0x%x, ddb (%d - %d), active pipes 0x%x\n", - for_crtc->base.id, for_crtc->name, + for_crtc->base.base.id, for_crtc->base.name, dbuf_slice_mask, alloc->start, alloc->end, active_pipes); return 0; @@ -4649,10 +4649,8 @@ static u8 tgl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes) return compute_dbuf_slices(pipe, active_pipes, tgl_allowed_dbufs); } -static u8 skl_compute_dbuf_slices(const struct intel_crtc_state *crtc_state, - u8 active_pipes) +static u8 skl_compute_dbuf_slices(struct intel_crtc *crtc, u8 active_pipes) { - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe;