diff mbox series

[v2,4/6] drm/i915/display: Split and export main surface calculation from skl_check_main_surface()

Message ID 20201027234526.33043-4-jose.souza@intel.com
State New, archived
Headers show
Series [v2,1/6] drm/i915/display/psr: Calculate selective fetch plane registers | expand

Commit Message

Souza, Jose Oct. 27, 2020, 11:45 p.m. UTC
The calculation the offsets of the main surface will be needed by PSR2
selective fetch code so here splitting and exporting it.
No functional changes were done here.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 95 ++++++++++++--------
 drivers/gpu/drm/i915/display/intel_display.h |  2 +
 2 files changed, 59 insertions(+), 38 deletions(-)

Comments

Gwan-gyeong Mun Nov. 27, 2020, 10:14 a.m. UTC | #1
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>

On Tue, 2020-10-27 at 16:45 -0700, José Roberto de Souza wrote:
> The calculation the offsets of the main surface will be needed by
> PSR2
> selective fetch code so here splitting and exporting it.
> No functional changes were done here.
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 95 ++++++++++++----
> ----
>  drivers/gpu/drm/i915/display/intel_display.h |  2 +
>  2 files changed, 59 insertions(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index f41b6f8b5618..460f9c17eea3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3897,6 +3897,56 @@ intel_plane_fence_y_offset(const struct
> intel_plane_state *plane_state)
>  	return y;
>  }
>  
> +int skl_calc_main_surface_offset(const struct intel_plane_state
> *plane_state,
> +				 int *x, int *y, u32 *offset)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(plane_state-
> >uapi.plane->dev);
> +	const struct drm_framebuffer *fb = plane_state->hw.fb;
> +	const int aux_plane = intel_main_to_aux_plane(fb, 0);
> +	const u32 aux_offset = plane_state-
> >color_plane[aux_plane].offset;
> +	const u32 alignment = intel_surf_alignment(fb, 0);
> +	const int w = drm_rect_width(&plane_state->uapi.src) >> 16;
> +
> +	intel_add_fb_offsets(x, y, plane_state, 0);
> +	*offset = intel_plane_compute_aligned_offset(x, y, plane_state,
> 0);
> +	if (drm_WARN_ON(&dev_priv->drm, alignment &&
> !is_power_of_2(alignment)))
> +		return -EINVAL;
> +
> +	/*
> +	 * AUX surface offset is specified as the distance from the
> +	 * main surface offset, and it must be non-negative. Make
> +	 * sure that is what we will get.
> +	 */
> +	if (aux_plane && *offset > aux_offset)
> +		*offset = intel_plane_adjust_aligned_offset(x, y,
> plane_state, 0,
> +							    *offset,
> +							    aux_offset
> & ~(alignment - 1));
> +
> +	/*
> +	 * When using an X-tiled surface, the plane blows up
> +	 * if the x offset + width exceed the stride.
> +	 *
> +	 * TODO: linear and Y-tiled seem fine, Yf untested,
> +	 */
> +	if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
> +		int cpp = fb->format->cpp[0];
> +
> +		while ((*x + w) * cpp > plane_state-
> >color_plane[0].stride) {
> +			if (*offset == 0) {
> +				drm_dbg_kms(&dev_priv->drm,
> +					    "Unable to find suitable
> display surface offset due to X-tiling\n");
> +				return -EINVAL;
> +			}
> +
> +			*offset = intel_plane_adjust_aligned_offset(x,
> y, plane_state, 0,
> +								    *of
> fset,
> +								    *of
> fset - alignment);
> +		}
> +	}
> +
> +	return 0;
> +}
> +
>  static int skl_check_main_surface(struct intel_plane_state
> *plane_state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(plane_state-
> >uapi.plane->dev);
> @@ -3907,9 +3957,10 @@ static int skl_check_main_surface(struct
> intel_plane_state *plane_state)
>  	int w = drm_rect_width(&plane_state->uapi.src) >> 16;
>  	int h = drm_rect_height(&plane_state->uapi.src) >> 16;
>  	int max_width, min_width, max_height;
> -	u32 alignment, offset;
> -	int aux_plane = intel_main_to_aux_plane(fb, 0);
> -	u32 aux_offset = plane_state->color_plane[aux_plane].offset;
> +	const int aux_plane = intel_main_to_aux_plane(fb, 0);
> +	const u32 alignment = intel_surf_alignment(fb, 0);
> +	u32 offset;
> +	int ret;
>  
>  	if (INTEL_GEN(dev_priv) >= 11) {
>  		max_width = icl_max_plane_width(fb, 0, rotation);
> @@ -3934,41 +3985,9 @@ static int skl_check_main_surface(struct
> intel_plane_state *plane_state)
>  		return -EINVAL;
>  	}
>  
> -	intel_add_fb_offsets(&x, &y, plane_state, 0);
> -	offset = intel_plane_compute_aligned_offset(&x, &y,
> plane_state, 0);
> -	alignment = intel_surf_alignment(fb, 0);
> -	if (drm_WARN_ON(&dev_priv->drm, alignment &&
> !is_power_of_2(alignment)))
> -		return -EINVAL;
> -
> -	/*
> -	 * AUX surface offset is specified as the distance from the
> -	 * main surface offset, and it must be non-negative. Make
> -	 * sure that is what we will get.
> -	 */
> -	if (aux_plane && offset > aux_offset)
> -		offset = intel_plane_adjust_aligned_offset(&x, &y,
> plane_state, 0,
> -							   offset,
> aux_offset & ~(alignment - 1));
> -
> -	/*
> -	 * When using an X-tiled surface, the plane blows up
> -	 * if the x offset + width exceed the stride.
> -	 *
> -	 * TODO: linear and Y-tiled seem fine, Yf untested,
> -	 */
> -	if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
> -		int cpp = fb->format->cpp[0];
> -
> -		while ((x + w) * cpp > plane_state-
> >color_plane[0].stride) {
> -			if (offset == 0) {
> -				drm_dbg_kms(&dev_priv->drm,
> -					    "Unable to find suitable
> display surface offset due to X-tiling\n");
> -				return -EINVAL;
> -			}
> -
> -			offset = intel_plane_adjust_aligned_offset(&x,
> &y, plane_state, 0,
> -								   offs
> et, offset - alignment);
> -		}
> -	}
> +	ret = skl_calc_main_surface_offset(plane_state, &x, &y,
> &offset);
> +	if (ret)
> +		return ret;
>  
>  	/*
>  	 * CCS AUX surface doesn't have its own x/y offsets, we must
> make sure
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 1b946209e06b..228ede8788d4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -613,6 +613,8 @@ u32 skl_plane_ctl_crtc(const struct
> intel_crtc_state *crtc_state);
>  u32 skl_plane_stride(const struct intel_plane_state *plane_state,
>  		     int plane);
>  int skl_check_plane_surface(struct intel_plane_state *plane_state);
> +int skl_calc_main_surface_offset(const struct intel_plane_state
> *plane_state,
> +				 int *x, int *y, u32 *offset);
>  int i9xx_check_plane_surface(struct intel_plane_state *plane_state);
>  int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);
>  unsigned int i9xx_plane_max_stride(struct intel_plane *plane,
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f41b6f8b5618..460f9c17eea3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3897,6 +3897,56 @@  intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)
 	return y;
 }
 
+int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
+				 int *x, int *y, u32 *offset)
+{
+	struct drm_i915_private *dev_priv = to_i915(plane_state->uapi.plane->dev);
+	const struct drm_framebuffer *fb = plane_state->hw.fb;
+	const int aux_plane = intel_main_to_aux_plane(fb, 0);
+	const u32 aux_offset = plane_state->color_plane[aux_plane].offset;
+	const u32 alignment = intel_surf_alignment(fb, 0);
+	const int w = drm_rect_width(&plane_state->uapi.src) >> 16;
+
+	intel_add_fb_offsets(x, y, plane_state, 0);
+	*offset = intel_plane_compute_aligned_offset(x, y, plane_state, 0);
+	if (drm_WARN_ON(&dev_priv->drm, alignment && !is_power_of_2(alignment)))
+		return -EINVAL;
+
+	/*
+	 * AUX surface offset is specified as the distance from the
+	 * main surface offset, and it must be non-negative. Make
+	 * sure that is what we will get.
+	 */
+	if (aux_plane && *offset > aux_offset)
+		*offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0,
+							    *offset,
+							    aux_offset & ~(alignment - 1));
+
+	/*
+	 * When using an X-tiled surface, the plane blows up
+	 * if the x offset + width exceed the stride.
+	 *
+	 * TODO: linear and Y-tiled seem fine, Yf untested,
+	 */
+	if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
+		int cpp = fb->format->cpp[0];
+
+		while ((*x + w) * cpp > plane_state->color_plane[0].stride) {
+			if (*offset == 0) {
+				drm_dbg_kms(&dev_priv->drm,
+					    "Unable to find suitable display surface offset due to X-tiling\n");
+				return -EINVAL;
+			}
+
+			*offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0,
+								    *offset,
+								    *offset - alignment);
+		}
+	}
+
+	return 0;
+}
+
 static int skl_check_main_surface(struct intel_plane_state *plane_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(plane_state->uapi.plane->dev);
@@ -3907,9 +3957,10 @@  static int skl_check_main_surface(struct intel_plane_state *plane_state)
 	int w = drm_rect_width(&plane_state->uapi.src) >> 16;
 	int h = drm_rect_height(&plane_state->uapi.src) >> 16;
 	int max_width, min_width, max_height;
-	u32 alignment, offset;
-	int aux_plane = intel_main_to_aux_plane(fb, 0);
-	u32 aux_offset = plane_state->color_plane[aux_plane].offset;
+	const int aux_plane = intel_main_to_aux_plane(fb, 0);
+	const u32 alignment = intel_surf_alignment(fb, 0);
+	u32 offset;
+	int ret;
 
 	if (INTEL_GEN(dev_priv) >= 11) {
 		max_width = icl_max_plane_width(fb, 0, rotation);
@@ -3934,41 +3985,9 @@  static int skl_check_main_surface(struct intel_plane_state *plane_state)
 		return -EINVAL;
 	}
 
-	intel_add_fb_offsets(&x, &y, plane_state, 0);
-	offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 0);
-	alignment = intel_surf_alignment(fb, 0);
-	if (drm_WARN_ON(&dev_priv->drm, alignment && !is_power_of_2(alignment)))
-		return -EINVAL;
-
-	/*
-	 * AUX surface offset is specified as the distance from the
-	 * main surface offset, and it must be non-negative. Make
-	 * sure that is what we will get.
-	 */
-	if (aux_plane && offset > aux_offset)
-		offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
-							   offset, aux_offset & ~(alignment - 1));
-
-	/*
-	 * When using an X-tiled surface, the plane blows up
-	 * if the x offset + width exceed the stride.
-	 *
-	 * TODO: linear and Y-tiled seem fine, Yf untested,
-	 */
-	if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
-		int cpp = fb->format->cpp[0];
-
-		while ((x + w) * cpp > plane_state->color_plane[0].stride) {
-			if (offset == 0) {
-				drm_dbg_kms(&dev_priv->drm,
-					    "Unable to find suitable display surface offset due to X-tiling\n");
-				return -EINVAL;
-			}
-
-			offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
-								   offset, offset - alignment);
-		}
-	}
+	ret = skl_calc_main_surface_offset(plane_state, &x, &y, &offset);
+	if (ret)
+		return ret;
 
 	/*
 	 * CCS AUX surface doesn't have its own x/y offsets, we must make sure
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 1b946209e06b..228ede8788d4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -613,6 +613,8 @@  u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state);
 u32 skl_plane_stride(const struct intel_plane_state *plane_state,
 		     int plane);
 int skl_check_plane_surface(struct intel_plane_state *plane_state);
+int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
+				 int *x, int *y, u32 *offset);
 int i9xx_check_plane_surface(struct intel_plane_state *plane_state);
 int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);
 unsigned int i9xx_plane_max_stride(struct intel_plane *plane,