From patchwork Wed Nov 11 16:24:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 11898119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B947C388F9 for ; Wed, 11 Nov 2020 16:24:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 207002072C for ; Wed, 11 Nov 2020 16:24:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 207002072C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B18B89FE6; Wed, 11 Nov 2020 16:24:27 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id DA6DA89216 for ; Wed, 11 Nov 2020 16:24:23 +0000 (UTC) IronPort-SDR: 0kkPtOuSqOEfeHej3mlWtN4eRceRrXDlYXgK8TQLlxqIt83kDVU2kaMItbFUNvetX4ZGzXVgCg xrYF8EyTIp3g== X-IronPort-AV: E=McAfee;i="6000,8403,9802"; a="231794938" X-IronPort-AV: E=Sophos;i="5.77,470,1596524400"; d="scan'208";a="231794938" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2020 08:24:23 -0800 IronPort-SDR: mX22KVpXT9F7VKzJvmSGS8+66xKr5MPXa5hQ+B8ocKx1i3k0QegLhmbs10od3SYMTKsBjbAOAT v8M1NXhHE5eg== X-IronPort-AV: E=Sophos;i="5.77,470,1596524400"; d="scan'208";a="473909031" Received: from rmarepal-mobl2.amr.corp.intel.com (HELO josouza-mobl2.intel.com) ([10.212.98.105]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2020 08:24:21 -0800 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Wed, 11 Nov 2020 08:24:08 -0800 Message-Id: <20201111162408.98002-2-jose.souza@intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201111162408.98002-1-jose.souza@intel.com> References: <20201111162408.98002-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/2] drm/i915/display: Make get_allowed_dc_mask().max_dc set a chain of if and elses X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Just following what we do in many other places, DG1 is a exception so move it to the top instead of add it inside of INTEL_GEN(dev_priv) >= 12. Cc: Lucas De Marchi Cc: Anusha Srivatsa Signed-off-by: José Roberto de Souza Reviewed-by: Lucas De Marchi --- .../gpu/drm/i915/display/intel_display_power.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 48d41a43fbb2..31cb9ac5c489 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -4492,20 +4492,16 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv, int requested_dc; int max_dc; - if (INTEL_GEN(dev_priv) >= 12) { - if (IS_DG1(dev_priv)) - max_dc = 3; - else - max_dc = 4; - } else if (IS_GEN(dev_priv, 11)) { + if (IS_DG1(dev_priv)) + max_dc = 3; + else if (INTEL_GEN(dev_priv) >= 12) + max_dc = 4; + else if (INTEL_GEN(dev_priv) >= 10 || IS_GEN9_BC(dev_priv)) max_dc = 2; - } else if (IS_GEN(dev_priv, 10) || IS_GEN9_BC(dev_priv)) { - max_dc = 2; - } else if (IS_GEN9_LP(dev_priv)) { + else if (IS_GEN9_LP(dev_priv)) max_dc = 1; - } else { + else max_dc = 0; - } /* * DC9 has a separate HW flow from the rest of the DC states,