@@ -258,7 +258,8 @@ i915-y += i915_perf.o
i915-y += \
pxp/intel_pxp.o \
pxp/intel_pxp_context.o \
- pxp/intel_pxp_sm.o
+ pxp/intel_pxp_sm.o \
+ pxp/intel_pxp_pm.o
# Post-mortem debug and GPU hang state capture
i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
@@ -68,6 +68,8 @@
#include "gt/intel_gt_pm.h"
#include "gt/intel_rc6.h"
+#include "pxp/intel_pxp_pm.h"
+
#include "i915_debugfs.h"
#include "i915_drv.h"
#include "i915_ioc32.h"
@@ -1094,6 +1096,8 @@ static int i915_drm_prepare(struct drm_device *dev)
*/
i915_gem_suspend(i915);
+ intel_pxp_pm_prepare_suspend(i915);
+
return 0;
}
@@ -1277,6 +1281,8 @@ static int i915_drm_resume(struct drm_device *dev)
intel_power_domains_enable(dev_priv);
+ intel_pxp_pm_resume(dev_priv);
+
enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
return 0;
@@ -1348,6 +1354,8 @@ static int i915_drm_resume_early(struct drm_device *dev)
intel_power_domains_resume(dev_priv);
+ intel_pxp_pm_resume_early(dev_priv);
+
enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
return ret;
new file mode 100644
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020 Intel Corporation.
+ */
+
+#include "i915_drv.h"
+#include "intel_pxp_context.h"
+#include "intel_pxp_sm.h"
+#include "intel_pxp_pm.h"
+
+void intel_pxp_pm_prepare_suspend(struct drm_i915_private *i915)
+{
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!i915->pxp.r0ctx)
+ return;
+
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ /* Disable PXP-IOCTLs */
+ i915->pxp.r0ctx->global_state_in_suspend = true;
+
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+
+ drm_dbg(&i915->drm, "<<< %s\n", __func__);
+}
+
+void intel_pxp_pm_resume_early(struct drm_i915_private *i915)
+{
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!i915->pxp.r0ctx)
+ return;
+
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ if (i915->pxp.r0ctx->global_state_in_suspend) {
+ /* reset the attacked flag even there was a pending */
+ i915->pxp.r0ctx->global_state_attacked = false;
+
+ i915->pxp.r0ctx->flag_display_hm_surface_keys = false;
+ }
+
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+ drm_dbg(&i915->drm, "<<< %s\n", __func__);
+}
+
+int intel_pxp_pm_resume(struct drm_i915_private *i915)
+{
+ int ret = 0;
+
+ drm_dbg(&i915->drm, ">>> %s\n", __func__);
+
+ if (!i915->pxp.r0ctx)
+ return 0;
+
+ mutex_lock(&i915->pxp.r0ctx->ctx_mutex);
+
+ /* Re-enable PXP-IOCTLs */
+ if (i915->pxp.r0ctx->global_state_in_suspend) {
+ intel_pxp_destroy_r3ctx_list(i915);
+
+ ret = intel_pxp_sm_terminate_all_active_sessions(i915, SESSION_TYPE_TYPE0);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to intel_pxp_sm_terminate_all_active_sessions with type0\n");
+ goto end;
+ }
+
+ ret = intel_pxp_sm_terminate_all_active_sessions(i915, SESSION_TYPE_TYPE1);
+ if (ret) {
+ drm_dbg(&i915->drm, "Failed to intel_pxp_sm_terminate_all_active_sessions with type1\n");
+ goto end;
+ }
+
+ i915->pxp.r0ctx->global_state_in_suspend = false;
+ }
+
+end:
+ mutex_unlock(&i915->pxp.r0ctx->ctx_mutex);
+ drm_dbg(&i915->drm, "<<< %s ret=[%d]\n", __func__, ret);
+
+ return ret;
+}
new file mode 100644
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_PM_H__
+#define __INTEL_PXP_PM_H__
+
+void intel_pxp_pm_prepare_suspend(struct drm_i915_private *i915);
+
+void intel_pxp_pm_resume_early(struct drm_i915_private *i915);
+int intel_pxp_pm_resume(struct drm_i915_private *i915);
+
+#endif