From patchwork Sun Nov 15 20:23:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11906823 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EFF0C63697 for ; Sun, 15 Nov 2020 20:24:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5BCA1238E6 for ; Sun, 15 Nov 2020 20:24:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5BCA1238E6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 030246E9BF; Sun, 15 Nov 2020 20:24:15 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9010D89F03 for ; Sun, 15 Nov 2020 20:23:49 +0000 (UTC) IronPort-SDR: 2C8vyOflghVjenlHJaMvw2tx66UKfQgfboN8itypaylG0i/HQdL5zNq9Eu+3yMyqoGyvyjXLXe HA8QyBgSbmGA== X-IronPort-AV: E=McAfee;i="6000,8403,9806"; a="167165312" X-IronPort-AV: E=Sophos;i="5.77,481,1596524400"; d="scan'208";a="167165312" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2020 12:23:48 -0800 IronPort-SDR: u31d1HqHBitvmmGDz2YXh77+bvqgaRTKLpgP+aD4duYesgRAtmxRNUAj3S1UrFihMdCVvMxnID TvR3H+wPNwHw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,481,1596524400"; d="scan'208";a="430005354" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by fmsmga001.fm.intel.com with ESMTP; 15 Nov 2020 12:23:47 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Sun, 15 Nov 2020 12:23:38 -0800 Message-Id: <20201115202347.29224-18-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201115202347.29224-1-sean.z.huang@intel.com> References: <20201115202347.29224-1-sean.z.huang@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 18/27] drm/i915/pxp: Implement funcs to create the TEE channel X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently ring3 driver sends the TEE commands directly to TEE, but later, as our design, we would like to make ring3 sending the TEE commands via the ring0 PXP ioctl action instead of TEE ioctl, so we can centralize those protection operations at ring0 PXP. Co-developed-by: Vitaly Lubart Co-developed-by: Tomas Winkler Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 + drivers/gpu/drm/i915/pxp/intel_pxp.c | 5 + drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 140 +++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 14 +++ include/drm/i915_component.h | 1 + include/drm/i915_pxp_tee_interface.h | 45 ++++++++ 8 files changed, 213 insertions(+) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.h create mode 100644 include/drm/i915_pxp_tee_interface.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 6858392c1ef2..1f3e0b89ae42 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -259,6 +259,7 @@ i915-y += \ pxp/intel_pxp.o \ pxp/intel_pxp_context.o \ pxp/intel_pxp_sm.o \ + pxp/intel_pxp_tee.o \ pxp/intel_pxp_pm.o # Post-mortem debug and GPU hang state capture diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 830708414f92..73c77a4e8216 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -324,6 +324,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv) mutex_init(&dev_priv->wm.wm_mutex); mutex_init(&dev_priv->pps_mutex); mutex_init(&dev_priv->hdcp_comp_mutex); + mutex_init(&dev_priv->pxp_tee_comp_mutex); i915_memcpy_init_early(dev_priv); intel_runtime_pm_init_early(&dev_priv->runtime_pm); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f34ed07a68ee..9ba6eada4f84 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1219,6 +1219,12 @@ struct drm_i915_private { struct intel_pxp pxp; + struct i915_pxp_comp_master *pxp_tee_master; + bool pxp_tee_comp_added; + + /* Mutex to protect the above pxp_tee component related values. */ + struct mutex pxp_tee_comp_mutex; + I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;) /* diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 50968373c68e..a17af81a8d54 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -7,6 +7,7 @@ #include "intel_pxp.h" #include "intel_pxp_context.h" #include "intel_pxp_sm.h" +#include "intel_pxp_tee.h" int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile) { @@ -220,6 +221,8 @@ int intel_pxp_init(struct drm_i915_private *i915) return ret; } + intel_pxp_tee_component_init(i915); + INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work); i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED | @@ -231,6 +234,8 @@ int intel_pxp_init(struct drm_i915_private *i915) void intel_pxp_uninit(struct drm_i915_private *i915) { + intel_pxp_tee_component_fini(i915); + intel_pxp_destroy_r0ctx(i915); } diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c new file mode 100644 index 000000000000..88418fbd370e --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c @@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2020 Intel Corporation. + */ + +#include +#include "drm/i915_pxp_tee_interface.h" +#include "drm/i915_component.h" +#include "intel_pxp.h" +#include "intel_pxp_context.h" +#include "intel_pxp_tee.h" + +static int intel_pxp_tee_io_message(struct drm_i915_private *i915, + void *msg_in, u32 msg_in_size, + void *msg_out, u32 *msg_out_size_ptr, + u32 msg_out_buf_size) +{ + int ret; + struct i915_pxp_comp_master *pxp_tee_master = i915->pxp_tee_master; + + if (!pxp_tee_master || !msg_in || !msg_out || !msg_out_size_ptr) { + ret = -EINVAL; + drm_dbg(&i915->drm, "Failed to %s, invalid params\n", __func__); + goto end; + } + + lockdep_assert_held(&i915->pxp_tee_comp_mutex); + + if (drm_debug_enabled(DRM_UT_DRIVER)) + print_hex_dump(KERN_DEBUG, "TEE input message binaries:", + DUMP_PREFIX_OFFSET, 4, 4, msg_in, msg_in_size, true); + + ret = pxp_tee_master->ops->send(pxp_tee_master->tee_dev, msg_in, msg_in_size); + if (ret) { + ret = -EFAULT; + drm_dbg(&i915->drm, "Failed to send TEE message\n"); + goto end; + } + + ret = pxp_tee_master->ops->receive(pxp_tee_master->tee_dev, msg_out, msg_out_buf_size); + if (ret < 0) { + ret = -EFAULT; + drm_dbg(&i915->drm, "Failed to receive TEE message\n"); + goto end; + } + + if (ret > msg_out_buf_size) { + ret = -EFAULT; + drm_dbg(&i915->drm, "Failed to receive TEE message due to unexpected output size\n"); + goto end; + } + + *msg_out_size_ptr = ret; + ret = 0; + + if (drm_debug_enabled(DRM_UT_DRIVER)) + print_hex_dump(KERN_DEBUG, "TEE output message binaries:", + DUMP_PREFIX_OFFSET, 4, 4, msg_out, *msg_out_size_ptr, true); +end: + return ret; +} + +/** + * i915_pxp_tee_component_bind - bind funciton to pass the function pointers to pxp_tee + * @i915_kdev: pointer to i915 kernel device + * @tee_kdev: pointer to tee kernel device + * @data: pointer to pxp_tee_master containing the function pointers + * + * This bind function is called during the system boot or resume from system sleep. + * + * Return: return 0 if successful. + */ +static int i915_pxp_tee_component_bind(struct device *i915_kdev, + struct device *tee_kdev, void *data) +{ + struct drm_i915_private *i915 = kdev_to_i915(i915_kdev); + + drm_dbg(&i915->drm, "i915 PXP TEE component bind\n"); + + if (!i915 || !tee_kdev || !data) { + drm_dbg(&i915->drm, "Failed to bind for i915 PXP TEE component, invalid params\n"); + return -EPERM; + } + + mutex_lock(&i915->pxp_tee_comp_mutex); + i915->pxp_tee_master = (struct i915_pxp_comp_master *)data; + i915->pxp_tee_master->tee_dev = tee_kdev; + mutex_unlock(&i915->pxp_tee_comp_mutex); + + return 0; +} + +static void i915_pxp_tee_component_unbind(struct device *i915_kdev, + struct device *tee_kdev, void *data) +{ + struct drm_i915_private *i915 = kdev_to_i915(i915_kdev); + + drm_dbg(&i915->drm, "i915 PXP TEE component unbind\n"); + + if (!i915 || !tee_kdev || !data) { + drm_dbg(&i915->drm, "Failed to unbind for i915 PXP TEE component, invalid params\n"); + return; + } + + mutex_lock(&i915->pxp_tee_comp_mutex); + i915->pxp_tee_master = NULL; + mutex_unlock(&i915->pxp_tee_comp_mutex); +} + +static const struct component_ops i915_pxp_tee_component_ops = { + .bind = i915_pxp_tee_component_bind, + .unbind = i915_pxp_tee_component_unbind, +}; + +void intel_pxp_tee_component_init(struct drm_i915_private *i915) +{ + int ret; + + drm_WARN_ON(&i915->drm, i915->pxp_tee_comp_added); + + ret = component_add_typed(i915->drm.dev, &i915_pxp_tee_component_ops, + I915_COMPONENT_PXP); + if (ret < 0) { + drm_dbg_kms(&i915->drm, "Failed at component add(%d)\n", ret); + return; + } + + mutex_lock(&i915->pxp_tee_comp_mutex); + i915->pxp_tee_comp_added = true; + mutex_unlock(&i915->pxp_tee_comp_mutex); +} + +void intel_pxp_tee_component_fini(struct drm_i915_private *i915) +{ + mutex_lock(&i915->pxp_tee_comp_mutex); + i915->pxp_tee_comp_added = false; + mutex_unlock(&i915->pxp_tee_comp_mutex); + + component_del(i915->drm.dev, &i915_pxp_tee_component_ops); +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h new file mode 100644 index 000000000000..0d0fbd0ed018 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_PXP_TEE_H__ +#define __INTEL_PXP_TEE_H__ + +#include "i915_drv.h" + +void intel_pxp_tee_component_init(struct drm_i915_private *i915); +void intel_pxp_tee_component_fini(struct drm_i915_private *i915); + +#endif /* __INTEL_PXP_TEE_H__ */ diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h index 55c3b123581b..c1e2a43d2d1e 100644 --- a/include/drm/i915_component.h +++ b/include/drm/i915_component.h @@ -29,6 +29,7 @@ enum i915_component_type { I915_COMPONENT_AUDIO = 1, I915_COMPONENT_HDCP, + I915_COMPONENT_PXP }; /* MAX_PORT is the number of port diff --git a/include/drm/i915_pxp_tee_interface.h b/include/drm/i915_pxp_tee_interface.h new file mode 100644 index 000000000000..3999e255e145 --- /dev/null +++ b/include/drm/i915_pxp_tee_interface.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2020 Intel Corporation + * + * Authors: + * Vitaly Lubart + */ + +#ifndef _I915_PXP_TEE_INTERFACE_H_ +#define _I915_PXP_TEE_INTERFACE_H_ + +#include +#include + +/** + * struct i915_pxp_component_ops - ops for PXP services. + * @owner: Module providing the ops + * @send: sends data to PXP + * @receive: receives data from PXP + */ +struct i915_pxp_component_ops { + /** + * @owner: owner of the module provding the ops + */ + struct module *owner; + + int (*send)(struct device *dev, const void *message, size_t size); + int (*receive)(struct device *dev, void *buffer, size_t size); +}; + +/** + * struct i915_pxp_component_master - Used for communication between i915 + * and TEE drivers for the PXP services + * @tee_dev: device that provide the PXP service from TEE Bus. + * @pxp_ops: Ops implemented by TEE driver, used by i915 driver. + */ +struct i915_pxp_comp_master { + struct device *tee_dev; + const struct i915_pxp_component_ops *ops; + + /* To protect the above members. */ + struct mutex mutex; +}; + +#endif /* _I915_TEE_PXP_INTERFACE_H_ */