Message ID | 20201117113103.21480-4-chris@chris-wilson.co.uk (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [01/28] drm/i915/selftests: Improve granularity for mocs reset checks | expand |
On 17/11/2020 11:30, Chris Wilson wrote: > The presumption was that some time would always elapse between recording > the start and the finish of a context switch. This turns out to be a > regular occurrence and emitting a debug statement superfluous. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 8a51c1c3a091..52b84474f93a 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1307,7 +1307,7 @@ static void reset_active(struct i915_request *rq, > static void st_update_runtime_underflow(struct intel_context *ce, s32 dt) > { > #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) > - ce->runtime.num_underflow += dt < 0; > + ce->runtime.num_underflow++; > ce->runtime.max_underflow = max_t(u32, ce->runtime.max_underflow, -dt); > #endif > } > @@ -1324,7 +1324,7 @@ static void intel_context_update_runtime(struct intel_context *ce) > ce->runtime.last = intel_context_get_runtime(ce); > dt = ce->runtime.last - old; > > - if (unlikely(dt <= 0)) { > + if (unlikely(dt < 0)) { > CE_TRACE(ce, "runtime underflow: last=%u, new=%u, delta=%d\n", > old, ce->runtime.last, dt); > st_update_runtime_underflow(ce, dt); > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 8a51c1c3a091..52b84474f93a 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -1307,7 +1307,7 @@ static void reset_active(struct i915_request *rq, static void st_update_runtime_underflow(struct intel_context *ce, s32 dt) { #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) - ce->runtime.num_underflow += dt < 0; + ce->runtime.num_underflow++; ce->runtime.max_underflow = max_t(u32, ce->runtime.max_underflow, -dt); #endif } @@ -1324,7 +1324,7 @@ static void intel_context_update_runtime(struct intel_context *ce) ce->runtime.last = intel_context_get_runtime(ce); dt = ce->runtime.last - old; - if (unlikely(dt <= 0)) { + if (unlikely(dt < 0)) { CE_TRACE(ce, "runtime underflow: last=%u, new=%u, delta=%d\n", old, ce->runtime.last, dt); st_update_runtime_underflow(ce, dt);
The presumption was that some time would always elapse between recording the start and the finish of a context switch. This turns out to be a regular occurrence and emitting a debug statement superfluous. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)