diff mbox series

[RFC,139/162] drm/i915/dg1: Keep engine awake across whole blit

Message ID 20201127120718.454037-140-matthew.auld@intel.com (mailing list archive)
State New, archived
Headers show
Series DG1 + LMEM enabling | expand

Commit Message

Matthew Auld Nov. 27, 2020, 12:06 p.m. UTC 
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Hold blitter engine power reference across the whole copy operation for
efficiency.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_object.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 34bbefa6d67f..c84443e01ef1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -1028,6 +1028,8 @@  int i915_window_blt_copy(struct drm_i915_gem_object *dst,
 
 	spin_unlock(&i915->mm.window_queue.lock);
 
+	intel_engine_pm_get(ce->engine);
+
 	do {
 		struct i915_request *rq;
 		long timeout;
@@ -1080,6 +1082,8 @@  int i915_window_blt_copy(struct drm_i915_gem_object *dst,
 		flush_work(&ce->engine->retire_work);
 	} while (remain);
 
+	intel_engine_pm_put(ce->engine);
+
 	spin_lock(&i915->mm.window_queue.lock);
 	src_vma->size = BLT_WINDOW_SZ;
 	dst_vma->size = BLT_WINDOW_SZ;