diff mbox series

[3/4] drm/i915/gt: Include reset failures in the trace

Message ID 20201203081616.1645-3-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series [1/4] drm/i915/gt: Ignore repeated attempts to suspend request flow across reset | expand

Commit Message

Chris Wilson Dec. 3, 2020, 8:16 a.m. UTC 
The GT and engine reset failures are completely invisible when looking at
a trace for a bug, but are vital to understanding the incomplete flow.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_reset.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

Comments

Mika Kuoppala Dec. 4, 2020, 1:59 p.m. UTC | #1 
Chris Wilson <chris@chris-wilson.co.uk> writes:

> The GT and engine reset failures are completely invisible when looking at
> a trace for a bug, but are vital to understanding the incomplete flow.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_reset.c | 22 ++++++++++------------
>  1 file changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index 3654c955e6be..000d63588e9e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -231,7 +231,7 @@ static int g4x_do_reset(struct intel_gt *gt,
>  			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
>  	ret =  wait_for_atomic(g4x_reset_complete(pdev), 50);
>  	if (ret) {
> -		drm_dbg(&gt->i915->drm, "Wait for media reset failed\n");
> +		GT_TRACE(gt, "Wait for media reset failed\n");
>  		goto out;
>  	}
>  
> @@ -239,7 +239,7 @@ static int g4x_do_reset(struct intel_gt *gt,
>  			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
>  	ret =  wait_for_atomic(g4x_reset_complete(pdev), 50);
>  	if (ret) {
> -		drm_dbg(&gt->i915->drm, "Wait for render reset failed\n");
> +		GT_TRACE(gt, "Wait for render reset failed\n");
>  		goto out;
>  	}
>  
> @@ -265,7 +265,7 @@ static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask,
>  					   5000, 0,
>  					   NULL);
>  	if (ret) {
> -		drm_dbg(&gt->i915->drm, "Wait for render reset failed\n");
> +		GT_TRACE(gt, "Wait for render reset failed\n");
>  		goto out;
>  	}
>  
> @@ -276,7 +276,7 @@ static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask,
>  					   5000, 0,
>  					   NULL);
>  	if (ret) {
> -		drm_dbg(&gt->i915->drm, "Wait for media reset failed\n");
> +		GT_TRACE(gt, "Wait for media reset failed\n");
>  		goto out;
>  	}
>  
> @@ -305,9 +305,9 @@ static int gen6_hw_domain_reset(struct intel_gt *gt, u32 hw_domain_mask)
>  					   500, 0,
>  					   NULL);
>  	if (err)
> -		drm_dbg(&gt->i915->drm,
> -			"Wait for 0x%08x engines reset failed\n",
> -			hw_domain_mask);
> +		GT_TRACE(gt,
> +			 "Wait for 0x%08x engines reset failed\n",
> +			 hw_domain_mask);
>  
>  	return err;
>  }
> @@ -407,8 +407,7 @@ static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
>  		return 0;
>  
>  	if (ret) {
> -		drm_dbg(&engine->i915->drm,
> -			"Wait for SFC forced lock ack failed\n");
> +		ENGINE_TRACE(engine, "Wait for SFC forced lock ack failed\n");
>  		return ret;
>  	}
>  
> @@ -1148,8 +1147,7 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
>  		ret = intel_guc_reset_engine(&engine->gt->uc.guc, engine);
>  	if (ret) {
>  		/* If we fail here, we expect to fallback to a global reset */
> -		drm_dbg(&gt->i915->drm, "%sFailed to reset %s, ret=%d\n",
> -			uses_guc ? "GuC " : "", engine->name, ret);
> +		ENGINE_TRACE(engine, "Failed to reset, err: %d\n", ret);
>  		goto out;
>  	}
>  
> @@ -1186,7 +1184,7 @@ static void intel_gt_reset_global(struct intel_gt *gt,
>  
>  	kobject_uevent_env(kobj, KOBJ_CHANGE, error_event);
>  
> -	drm_dbg(&gt->i915->drm, "resetting chip, engines=%x\n", engine_mask);
> +	GT_TRACE(gt, "resetting chip, engines=%x\n", engine_mask);
>  	kobject_uevent_env(kobj, KOBJ_CHANGE, reset_event);
>  
>  	/* Use a watchdog to ensure that our reset completes */
> -- 
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 3654c955e6be..000d63588e9e 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -231,7 +231,7 @@  static int g4x_do_reset(struct intel_gt *gt,
 			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
 	ret =  wait_for_atomic(g4x_reset_complete(pdev), 50);
 	if (ret) {
-		drm_dbg(&gt->i915->drm, "Wait for media reset failed\n");
+		GT_TRACE(gt, "Wait for media reset failed\n");
 		goto out;
 	}
 
@@ -239,7 +239,7 @@  static int g4x_do_reset(struct intel_gt *gt,
 			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
 	ret =  wait_for_atomic(g4x_reset_complete(pdev), 50);
 	if (ret) {
-		drm_dbg(&gt->i915->drm, "Wait for render reset failed\n");
+		GT_TRACE(gt, "Wait for render reset failed\n");
 		goto out;
 	}
 
@@ -265,7 +265,7 @@  static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask,
 					   5000, 0,
 					   NULL);
 	if (ret) {
-		drm_dbg(&gt->i915->drm, "Wait for render reset failed\n");
+		GT_TRACE(gt, "Wait for render reset failed\n");
 		goto out;
 	}
 
@@ -276,7 +276,7 @@  static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask,
 					   5000, 0,
 					   NULL);
 	if (ret) {
-		drm_dbg(&gt->i915->drm, "Wait for media reset failed\n");
+		GT_TRACE(gt, "Wait for media reset failed\n");
 		goto out;
 	}
 
@@ -305,9 +305,9 @@  static int gen6_hw_domain_reset(struct intel_gt *gt, u32 hw_domain_mask)
 					   500, 0,
 					   NULL);
 	if (err)
-		drm_dbg(&gt->i915->drm,
-			"Wait for 0x%08x engines reset failed\n",
-			hw_domain_mask);
+		GT_TRACE(gt,
+			 "Wait for 0x%08x engines reset failed\n",
+			 hw_domain_mask);
 
 	return err;
 }
@@ -407,8 +407,7 @@  static int gen11_lock_sfc(struct intel_engine_cs *engine, u32 *hw_mask)
 		return 0;
 
 	if (ret) {
-		drm_dbg(&engine->i915->drm,
-			"Wait for SFC forced lock ack failed\n");
+		ENGINE_TRACE(engine, "Wait for SFC forced lock ack failed\n");
 		return ret;
 	}
 
@@ -1148,8 +1147,7 @@  int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
 		ret = intel_guc_reset_engine(&engine->gt->uc.guc, engine);
 	if (ret) {
 		/* If we fail here, we expect to fallback to a global reset */
-		drm_dbg(&gt->i915->drm, "%sFailed to reset %s, ret=%d\n",
-			uses_guc ? "GuC " : "", engine->name, ret);
+		ENGINE_TRACE(engine, "Failed to reset, err: %d\n", ret);
 		goto out;
 	}
 
@@ -1186,7 +1184,7 @@  static void intel_gt_reset_global(struct intel_gt *gt,
 
 	kobject_uevent_env(kobj, KOBJ_CHANGE, error_event);
 
-	drm_dbg(&gt->i915->drm, "resetting chip, engines=%x\n", engine_mask);
+	GT_TRACE(gt, "resetting chip, engines=%x\n", engine_mask);
 	kobject_uevent_env(kobj, KOBJ_CHANGE, reset_event);
 
 	/* Use a watchdog to ensure that our reset completes */