diff mbox series

[v4,15/18] drm/i915/display: Helpers for VRR vblank min and max start

Message ID 20210113220935.4151-16-manasi.d.navare@intel.com (mailing list archive)
State New, archived
Headers show
Series VRR/Adaptive Sync Enabling on DP/eDP for TGL+ | expand

Commit Message

Manasi Navare Jan. 13, 2021, 10:09 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

With VRR the earliest the registers can get latched are at
flipline decision boundary, calculate that as vrr_vmin_vblank_start()
and the latest the regsiters can get latched are vmax decision boundary
calculate that as vrr_vmax_vblank_start()

Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 36 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_vrr.h |  2 ++
 2 files changed, 38 insertions(+)

Comments

Ville Syrjälä Jan. 19, 2021, 7:07 p.m. UTC | #1
On Wed, Jan 13, 2021 at 02:09:32PM -0800, Manasi Navare wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> With VRR the earliest the registers can get latched are at
> flipline decision boundary, calculate that as vrr_vmin_vblank_start()
> and the latest the regsiters can get latched are vmax decision boundary
> calculate that as vrr_vmax_vblank_start()
> 
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vrr.c | 36 ++++++++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_vrr.h |  2 ++
>  2 files changed, 38 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 5dc6d578760a..9a18c36e4a9a 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -45,6 +45,42 @@ intel_vrr_check_modeset(struct intel_atomic_state *state)
>  	}
>  }
>  
> +/*
> + * Without VRR registers get latched at:
> + *  vblank_start
> + *
> + * With VRR the earliest registers can get latched is:
> + *  intel_vrr_vmin_vblank_start(), which if we want to maintain
> + *  the correct min vtotal is >=vblank_start+1
> + *
> + * The latest point registers can get latched is the vmax decision boundary:
> + *  intel_vrr_vmax_vblank_start()
> + *
> + * Between those two points the vblank exit starts (and hence registers get
> + * latched) ASAP after a push is sent.
> + *
> + * framestart_delay is programmable 0-3.
> + */
> +static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +
> +	/* TODO: Not sure why the hw imposes the extra scanline?, also check on TGL */

We can now drop the TGL TODO(s) since I tested it and confirmed it
follows the same rules.

> +	return crtc_state->vrr.pipeline_full + i915->framestart_delay + 2;
> +}
> +
> +int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state)
> +{
> +	/* Min vblank actually determined by flipline that is always >=vmin+1 */
> +	return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state);
> +}
> +
> +int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state)
> +{
> +	return crtc_state->vrr.vmax - intel_vrr_vblank_exit_length(crtc_state);
> +}
> +
>  void
>  intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>  			 struct drm_connector_state *conn_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> index 7610051edad2..d8b6b45557ca 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -27,5 +27,7 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state);
>  void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
>  void intel_vrr_get_config(struct intel_crtc *crtc,
>  			  struct intel_crtc_state *crtc_state);
> +int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
> +int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
>  
>  #endif /* __INTEL_VRR_H__ */
> -- 
> 2.19.1
Manasi Navare Jan. 21, 2021, 11 p.m. UTC | #2
Yes will drop that TODO

Also,

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi


On Tue, Jan 19, 2021 at 09:07:56PM +0200, Ville Syrjälä wrote:
> On Wed, Jan 13, 2021 at 02:09:32PM -0800, Manasi Navare wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > With VRR the earliest the registers can get latched are at
> > flipline decision boundary, calculate that as vrr_vmin_vblank_start()
> > and the latest the regsiters can get latched are vmax decision boundary
> > calculate that as vrr_vmax_vblank_start()
> > 
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_vrr.c | 36 ++++++++++++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_vrr.h |  2 ++
> >  2 files changed, 38 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> > index 5dc6d578760a..9a18c36e4a9a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> > @@ -45,6 +45,42 @@ intel_vrr_check_modeset(struct intel_atomic_state *state)
> >  	}
> >  }
> >  
> > +/*
> > + * Without VRR registers get latched at:
> > + *  vblank_start
> > + *
> > + * With VRR the earliest registers can get latched is:
> > + *  intel_vrr_vmin_vblank_start(), which if we want to maintain
> > + *  the correct min vtotal is >=vblank_start+1
> > + *
> > + * The latest point registers can get latched is the vmax decision boundary:
> > + *  intel_vrr_vmax_vblank_start()
> > + *
> > + * Between those two points the vblank exit starts (and hence registers get
> > + * latched) ASAP after a push is sent.
> > + *
> > + * framestart_delay is programmable 0-3.
> > + */
> > +static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state)
> > +{
> > +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > +
> > +	/* TODO: Not sure why the hw imposes the extra scanline?, also check on TGL */
> 
> We can now drop the TGL TODO(s) since I tested it and confirmed it
> follows the same rules.
> 
> > +	return crtc_state->vrr.pipeline_full + i915->framestart_delay + 2;
> > +}
> > +
> > +int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state)
> > +{
> > +	/* Min vblank actually determined by flipline that is always >=vmin+1 */
> > +	return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state);
> > +}
> > +
> > +int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state)
> > +{
> > +	return crtc_state->vrr.vmax - intel_vrr_vblank_exit_length(crtc_state);
> > +}
> > +
> >  void
> >  intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
> >  			 struct drm_connector_state *conn_state)
> > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> > index 7610051edad2..d8b6b45557ca 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> > @@ -27,5 +27,7 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state);
> >  void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
> >  void intel_vrr_get_config(struct intel_crtc *crtc,
> >  			  struct intel_crtc_state *crtc_state);
> > +int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
> > +int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
> >  
> >  #endif /* __INTEL_VRR_H__ */
> > -- 
> > 2.19.1
> 
> -- 
> Ville Syrjälä
> Intel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 5dc6d578760a..9a18c36e4a9a 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -45,6 +45,42 @@  intel_vrr_check_modeset(struct intel_atomic_state *state)
 	}
 }
 
+/*
+ * Without VRR registers get latched at:
+ *  vblank_start
+ *
+ * With VRR the earliest registers can get latched is:
+ *  intel_vrr_vmin_vblank_start(), which if we want to maintain
+ *  the correct min vtotal is >=vblank_start+1
+ *
+ * The latest point registers can get latched is the vmax decision boundary:
+ *  intel_vrr_vmax_vblank_start()
+ *
+ * Between those two points the vblank exit starts (and hence registers get
+ * latched) ASAP after a push is sent.
+ *
+ * framestart_delay is programmable 0-3.
+ */
+static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+
+	/* TODO: Not sure why the hw imposes the extra scanline?, also check on TGL */
+	return crtc_state->vrr.pipeline_full + i915->framestart_delay + 2;
+}
+
+int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state)
+{
+	/* Min vblank actually determined by flipline that is always >=vmin+1 */
+	return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state);
+}
+
+int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state)
+{
+	return crtc_state->vrr.vmax - intel_vrr_vblank_exit_length(crtc_state);
+}
+
 void
 intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 			 struct drm_connector_state *conn_state)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 7610051edad2..d8b6b45557ca 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -27,5 +27,7 @@  void intel_vrr_send_push(const struct intel_crtc_state *crtc_state);
 void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
 void intel_vrr_get_config(struct intel_crtc *crtc,
 			  struct intel_crtc_state *crtc_state);
+int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
+int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_VRR_H__ */