diff mbox series

[v4,04/18] drm/i915: Extract intel_mode_vblank_start()

Message ID 20210113220935.4151-5-manasi.d.navare@intel.com (mailing list archive)
State New, archived
Headers show
Series VRR/Adaptive Sync Enabling on DP/eDP for TGL+ | expand

Commit Message

Manasi Navare Jan. 13, 2021, 10:09 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We want to calculate the vblank_start for vblank evasion
differently for vrr. To make that nicer lets first extract
the current non-vrr case to a helper.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_sprite.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

Comments

Manasi Navare Jan. 21, 2021, 10:36 p.m. UTC | #1
On Wed, Jan 13, 2021 at 02:09:21PM -0800, Manasi Navare wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We want to calculate the vblank_start for vblank evasion
> differently for vrr. To make that nicer lets first extract
> the current non-vrr case to a helper.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_sprite.c | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index cf3589fd0ddb..ced6af7cdc84 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -62,6 +62,16 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
>  			    1000 * adjusted_mode->crtc_htotal);
>  }
>  
> +static int intel_mode_vblank_start(const struct drm_display_mode *mode)
> +{
> +	int vblank_start = mode->crtc_vblank_start;
> +
> +	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
> +		vblank_start = DIV_ROUND_UP(vblank_start, 2);
> +
> +	return vblank_start;
> +}
> +
>  /**
>   * intel_pipe_update_start() - start update of a set of display registers
>   * @new_crtc_state: the new crtc state
> @@ -90,9 +100,7 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
>  	if (new_crtc_state->uapi.async_flip)
>  		return;
>  
> -	vblank_start = adjusted_mode->crtc_vblank_start;
> -	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
> -		vblank_start = DIV_ROUND_UP(vblank_start, 2);
> +	vblank_start = intel_mode_vblank_start(adjusted_mode);
>  
>  	/* FIXME needs to be calibrated sensibly */
>  	min = vblank_start - intel_usecs_to_scanlines(adjusted_mode,
> -- 
> 2.19.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index cf3589fd0ddb..ced6af7cdc84 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -62,6 +62,16 @@  int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
 			    1000 * adjusted_mode->crtc_htotal);
 }
 
+static int intel_mode_vblank_start(const struct drm_display_mode *mode)
+{
+	int vblank_start = mode->crtc_vblank_start;
+
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		vblank_start = DIV_ROUND_UP(vblank_start, 2);
+
+	return vblank_start;
+}
+
 /**
  * intel_pipe_update_start() - start update of a set of display registers
  * @new_crtc_state: the new crtc state
@@ -90,9 +100,7 @@  void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
 	if (new_crtc_state->uapi.async_flip)
 		return;
 
-	vblank_start = adjusted_mode->crtc_vblank_start;
-	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
-		vblank_start = DIV_ROUND_UP(vblank_start, 2);
+	vblank_start = intel_mode_vblank_start(adjusted_mode);
 
 	/* FIXME needs to be calibrated sensibly */
 	min = vblank_start - intel_usecs_to_scanlines(adjusted_mode,