From patchwork Mon Jan 18 06:07:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 12026583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3EA1C433DB for ; Mon, 18 Jan 2021 06:08:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7817F22513 for ; Mon, 18 Jan 2021 06:08:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7817F22513 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 09EE589FC8; Mon, 18 Jan 2021 06:08:04 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0EA5189F71 for ; Mon, 18 Jan 2021 06:07:34 +0000 (UTC) IronPort-SDR: PqvLN1mvC9BPDZPSD05VisNTN5ZRNDvzSbcfpqI8w5TORo3TMrOTUSdSKNRVXokaPsTJBTEy8C 6JhdlZzFVaJg== X-IronPort-AV: E=McAfee;i="6000,8403,9867"; a="197455403" X-IronPort-AV: E=Sophos;i="5.79,355,1602572400"; d="scan'208";a="197455403" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jan 2021 22:07:32 -0800 IronPort-SDR: +4YkglvAGs6UMO0RVLnFeNPSkkCxvljZcEUkBI1ZNzeJ60jBkUh8L6JLzXfbhxUDLPZkX24H8g w/+ZqA8AiwBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,355,1602572400"; d="scan'208";a="399016997" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by fmsmga004.fm.intel.com with ESMTP; 17 Jan 2021 22:07:32 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Sun, 17 Jan 2021 22:07:29 -0800 Message-Id: <20210118060730.15425-13-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210118060730.15425-1-sean.z.huang@intel.com> References: <20210118060730.15425-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v21 12/13] drm/i915/pxp: User interface for Protected buffer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kumar.gaurav@intel.com, Huang Sean Z , Bommu Krishnaiah , Kondapally Kalyan MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Bommu Krishnaiah This api allow user mode to create Protected buffer and context creation. rev21: - Only allow set I915_CONTEXT_PARAM_PROTECTED_CONTENT during context creation (i915_gem_context_create_ioctl), but not allow during context set param (i915_gem_context_setparam_ioctl) Signed-off-by: Bommu Krishnaiah Cc: Telukuntla Sreedhar Cc: Kondapally Kalyan Cc: Gupta Anshuman Cc: Huang Sean Z --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 +++++++++-- drivers/gpu/drm/i915/gem/i915_gem_context.h | 5 ++++ drivers/gpu/drm/i915/gem/i915_gem_create.c | 27 ++++++++++++++++--- .../gpu/drm/i915/gem/i915_gem_object_types.h | 5 ++++ include/uapi/drm/i915_drm.h | 10 +++++++ 5 files changed, 57 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index 4d2f40cf237b..0b8e1b3887f4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -81,6 +81,8 @@ #include "i915_trace.h" #include "i915_user_extensions.h" +#include "pxp/intel_pxp.h" + #define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1 static struct i915_global_gem_context { @@ -2004,8 +2006,12 @@ static int ctx_setparam(struct drm_i915_file_private *fpriv, case I915_CONTEXT_PARAM_RECOVERABLE: if (args->size) ret = -EINVAL; - else if (args->value) - i915_gem_context_set_recoverable(ctx); + else if (args->value) { + if (!i915_gem_context_is_protected(ctx)) + i915_gem_context_set_recoverable(ctx); + else + ret = -EPERM; + } else i915_gem_context_clear_recoverable(ctx); break; @@ -2052,6 +2058,7 @@ static int create_setparam(struct i915_user_extension __user *ext, void *data) { struct drm_i915_gem_context_create_ext_setparam local; const struct create_ext *arg = data; + int ret; if (copy_from_user(&local, ext, sizeof(local))) return -EFAULT; @@ -2059,6 +2066,10 @@ static int create_setparam(struct i915_user_extension __user *ext, void *data) if (local.param.ctx_id) return -EINVAL; + ret = intel_pxp_gem_context_create_param(arg->ctx, &local.param); + if (ret) + return ret; + return ctx_setparam(arg->fpriv, arg->ctx, &local.param); } diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h b/drivers/gpu/drm/i915/gem/i915_gem_context.h index b5c908f3f4f2..173154fdc311 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h @@ -70,6 +70,11 @@ static inline void i915_gem_context_set_recoverable(struct i915_gem_context *ctx set_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags); } +static inline bool i915_gem_context_is_protected(struct i915_gem_context *ctx) +{ + return test_bit(UCONTEXT_PROTECTED, &ctx->user_flags); +} + static inline void i915_gem_context_clear_recoverable(struct i915_gem_context *ctx) { clear_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c index 3ad3413c459f..c9b83217a6da 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c @@ -5,6 +5,7 @@ #include "gem/i915_gem_ioctls.h" #include "gem/i915_gem_region.h" +#include "pxp/intel_pxp.h" #include "i915_drv.h" #include "i915_user_extensions.h" @@ -13,7 +14,8 @@ static int i915_gem_create(struct drm_file *file, struct intel_memory_region *mr, u64 *size_p, - u32 *handle_p) + u32 *handle_p, + u64 user_flags) { struct drm_i915_gem_object *obj; u32 handle; @@ -35,6 +37,8 @@ i915_gem_create(struct drm_file *file, GEM_BUG_ON(size != obj->base.size); + obj->user_flags = user_flags; + ret = drm_gem_handle_create(file, &obj->base, &handle); /* drop reference from allocate - handle holds it now */ i915_gem_object_put(obj); @@ -89,11 +93,12 @@ i915_gem_dumb_create(struct drm_file *file, return i915_gem_create(file, intel_memory_region_by_type(to_i915(dev), mem_type), - &args->size, &args->handle); + &args->size, &args->handle, 0); } struct create_ext { struct drm_i915_private *i915; + unsigned long user_flags; }; static int __create_setparam(struct drm_i915_gem_object_param *args, @@ -104,6 +109,17 @@ static int __create_setparam(struct drm_i915_gem_object_param *args, return -EINVAL; } + switch (lower_32_bits(args->param)) { + case I915_PARAM_PROTECTED_CONTENT: + if (args->size) { + return -EINVAL; + } else if (args->data) { + ext_data->user_flags = args->data; + return 0; + } + break; + } + return -EINVAL; } @@ -145,8 +161,13 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data, if (ret) return ret; + if (ext_data.user_flags & I915_BO_PROTECTED) { + if (!intel_pxp_gem_object_status(i915)) + return -EINVAL; + } + return i915_gem_create(file, intel_memory_region_by_type(i915, INTEL_MEMORY_SYSTEM), - &args->size, &args->handle); + &args->size, &args->handle, ext_data.user_flags); } diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h index e2d9b7e1e152..90ac955463f4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h @@ -161,6 +161,11 @@ struct drm_i915_gem_object { } mmo; I915_SELFTEST_DECLARE(struct list_head st_link); + /** + * @user_flags: small set of booleans set by the user + */ + unsigned long user_flags; +#define I915_BO_PROTECTED BIT(0) unsigned long flags; #define I915_BO_ALLOC_CONTIGUOUS BIT(0) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index aa232ded9951..17a6e3545570 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1744,6 +1744,16 @@ struct drm_i915_gem_object_param { */ #define I915_OBJECT_PARAM (1ull << 32) +/* + * I915_PARAM_PROTECTED_CONTENT: + * + * If set to true (1) buffer contents is expected to be protected by + * PAVP encryption and requires decryption for scan out and processing. + * Protected buffers can only be used in PAVP protected contexts. + * A protected buffer may become invalid as a result of PAVP teardown. + */ +#define I915_PARAM_PROTECTED_CONTENT 0x1 + __u64 param; /* Data value or pointer */