| Message ID | 20210121154950.19898-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [CI,1/3] drm/i915/gt: Flush GT interrupt handler before changing interrupt state | expand |
Chris Wilson <chris@chris-wilson.co.uk> writes: > Before we clear any state that may be being written by an interrupt > handler on another core, flush the interrupt handlers. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > index b31ce0d60028..e8c20f80e353 100644 > --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > @@ -2656,7 +2656,10 @@ static void enable_error_interrupt(struct intel_engine_cs *engine) > { > u32 status; > > + /* Flush ongoing GT interrupts before touching interrupt state */ > + synchronize_hardirq(engine->i915->drm.irq); > engine->execlists.error_interrupt = 0; > + > ENGINE_WRITE(engine, RING_EMR, ~0u); > ENGINE_WRITE(engine, RING_EIR, ~0u); /* clear all existing errors */ > > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c index b31ce0d60028..e8c20f80e353 100644 --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c @@ -2656,7 +2656,10 @@ static void enable_error_interrupt(struct intel_engine_cs *engine) { u32 status; + /* Flush ongoing GT interrupts before touching interrupt state */ + synchronize_hardirq(engine->i915->drm.irq); engine->execlists.error_interrupt = 0; + ENGINE_WRITE(engine, RING_EMR, ~0u); ENGINE_WRITE(engine, RING_EIR, ~0u); /* clear all existing errors */
Before we clear any state that may be being written by an interrupt handler on another core, flush the interrupt handlers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 3 +++ 1 file changed, 3 insertions(+)