diff mbox series

[CI,06/10] drm/i915/gt: Wrap macro arg in ()

Message ID 20210122192913.4518-6-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series [CI,01/10] drm/i915/gt: SPDX cleanup | expand

Commit Message

Chris Wilson Jan. 22, 2021, 7:29 p.m. UTC
Checkpatch noticed that ppgtt->pd should have been (ppgtt)->pd to avoid
issues with macros.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
index e1bd92ef595f..41e5350a7a05 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
+++ b/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
@@ -39,7 +39,7 @@ 
 
 #define ASSIGN_CTX_PML4(ppgtt, reg_state) do { \
 	u32 *reg_state__ = (reg_state); \
-	const u64 addr__ = px_dma(ppgtt->pd); \
+	const u64 addr__ = px_dma((ppgtt)->pd); \
 	(reg_state__)[CTX_PDP0_UDW] = upper_32_bits(addr__); \
 	(reg_state__)[CTX_PDP0_LDW] = lower_32_bits(addr__); \
 } while (0)