diff mbox series

[CI,v5,08/18] drm/i915/display: VRR + DRRS cannot be enabled together

Message ID 20210122232647.22688-8-manasi.d.navare@intel.com (mailing list archive)
State New, archived
Headers show
Series [CI,v5,01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check | expand

Commit Message

Navare, Manasi Jan. 22, 2021, 11:26 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

If VRR is enabled, DRRS cannot be enabled, so make this check
in atomic check.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 6c1aaaf587c2..8c12d5375607 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1725,6 +1725,9 @@  intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
 	struct intel_connector *intel_connector = intel_dp->attached_connector;
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
+	if (pipe_config->vrr.enable)
+		return;
+
 	/*
 	 * DRRS and PSR can't be enable together, so giving preference to PSR
 	 * as it allows more power-savings by complete shutting down display,