| Message ID | 20210201085715.27435-32-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [01/57] drm/i915/gt: Restrict the GT clock override to just Icelake | expand |
On 01/02/2021 08:56, Chris Wilson wrote: > Whether the scheduler depends on interrupt delivery for forward progress > is a property of the scheduler backend not of the underlying engine, so > move the flag from inside the engine to i915_sched_engine. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/gt/intel_engine.h | 6 ++++++ > drivers/gpu/drm/i915/gt/intel_engine_types.h | 13 +++---------- > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +- > drivers/gpu/drm/i915/i915_scheduler_types.h | 7 +++++++ > 4 files changed, 17 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h > index ca3a9cb06328..db5419ba1dc8 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine.h > +++ b/drivers/gpu/drm/i915/gt/intel_engine.h > @@ -285,4 +285,10 @@ intel_engine_has_timeslices(struct intel_engine_cs *engine) > return i915_sched_has_timeslices(intel_engine_get_scheduler(engine)); > } > > +static inline bool > +intel_engine_needs_breadcrumb_tasklet(struct intel_engine_cs *engine) > +{ > + return i915_sched_needs_breadcrumb_tasklet(intel_engine_get_scheduler(engine)); > +} > + > #endif /* _INTEL_RINGBUFFER_H_ */ > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h > index 96a0aec29672..f856bd9b7dae 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h > +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h > @@ -442,10 +442,9 @@ struct intel_engine_cs { > #define I915_ENGINE_SUPPORTS_STATS BIT(1) > #define I915_ENGINE_HAS_PREEMPTION BIT(2) > #define I915_ENGINE_HAS_SEMAPHORES BIT(3) > -#define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(4) > -#define I915_ENGINE_IS_VIRTUAL BIT(5) > -#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(6) > -#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(7) > +#define I915_ENGINE_IS_VIRTUAL BIT(4) > +#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(5) > +#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(6) > unsigned int flags; > > /* > @@ -540,12 +539,6 @@ intel_engine_has_semaphores(const struct intel_engine_cs *engine) > return engine->flags & I915_ENGINE_HAS_SEMAPHORES; > } > > -static inline bool > -intel_engine_needs_breadcrumb_tasklet(const struct intel_engine_cs *engine) > -{ > - return engine->flags & I915_ENGINE_NEEDS_BREADCRUMB_TASKLET; > -} > - > static inline bool > intel_engine_is_virtual(const struct intel_engine_cs *engine) > { > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > index 887f38fb671f..e8c66d868c59 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > @@ -606,7 +606,6 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine) > } > engine->set_default_submission = guc_set_default_submission; > > - engine->flags |= I915_ENGINE_NEEDS_BREADCRUMB_TASKLET; > engine->flags |= I915_ENGINE_HAS_PREEMPTION; > > /* > @@ -656,6 +655,7 @@ int intel_guc_submission_setup(struct intel_engine_cs *engine) > > tasklet_setup(&engine->sched.tasklet, guc_submission_tasklet); > __set_bit(I915_SCHED_ACTIVE_BIT, &engine->sched.flags); > + __set_bit(I915_SCHED_NEEDS_BREADCRUMB_BIT, &engine->sched.flags); Bah here my idea from earlier falls apart a bit. Don't know. > > guc_default_vfuncs(engine); > guc_default_irqs(engine); > diff --git a/drivers/gpu/drm/i915/i915_scheduler_types.h b/drivers/gpu/drm/i915/i915_scheduler_types.h > index dfb29b8c2bee..b4a0e4e26bfd 100644 > --- a/drivers/gpu/drm/i915/i915_scheduler_types.h > +++ b/drivers/gpu/drm/i915/i915_scheduler_types.h > @@ -20,6 +20,7 @@ struct i915_request; > enum { > I915_SCHED_ACTIVE_BIT = 0, > I915_SCHED_HAS_TIMESLICES_BIT, > + I915_SCHED_NEEDS_BREADCRUMB_BIT, > }; > > /** > @@ -194,4 +195,10 @@ static inline bool i915_sched_has_timeslices(const struct i915_sched *se) > return test_bit(I915_SCHED_HAS_TIMESLICES_BIT, &se->flags); > } > > +static inline bool > +i915_sched_needs_breadcrumb_tasklet(const struct i915_sched *se) > +{ > + return test_bit(I915_SCHED_NEEDS_BREADCRUMB_BIT, &se->flags); > +} > + > #endif /* _I915_SCHEDULER_TYPES_H_ */ > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko
Quoting Tvrtko Ursulin (2021-02-04 15:28:30) > > On 01/02/2021 08:56, Chris Wilson wrote: > > Whether the scheduler depends on interrupt delivery for forward progress > > is a property of the scheduler backend not of the underlying engine, so > > move the flag from inside the engine to i915_sched_engine. > > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > --- > > drivers/gpu/drm/i915/gt/intel_engine.h | 6 ++++++ > > drivers/gpu/drm/i915/gt/intel_engine_types.h | 13 +++---------- > > drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +- > > drivers/gpu/drm/i915/i915_scheduler_types.h | 7 +++++++ > > 4 files changed, 17 insertions(+), 11 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h > > index ca3a9cb06328..db5419ba1dc8 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_engine.h > > +++ b/drivers/gpu/drm/i915/gt/intel_engine.h > > @@ -285,4 +285,10 @@ intel_engine_has_timeslices(struct intel_engine_cs *engine) > > return i915_sched_has_timeslices(intel_engine_get_scheduler(engine)); > > } > > > > +static inline bool > > +intel_engine_needs_breadcrumb_tasklet(struct intel_engine_cs *engine) > > +{ > > + return i915_sched_needs_breadcrumb_tasklet(intel_engine_get_scheduler(engine)); > > +} > > + > > #endif /* _INTEL_RINGBUFFER_H_ */ > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h > > index 96a0aec29672..f856bd9b7dae 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h > > +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h > > @@ -442,10 +442,9 @@ struct intel_engine_cs { > > #define I915_ENGINE_SUPPORTS_STATS BIT(1) > > #define I915_ENGINE_HAS_PREEMPTION BIT(2) > > #define I915_ENGINE_HAS_SEMAPHORES BIT(3) > > -#define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(4) > > -#define I915_ENGINE_IS_VIRTUAL BIT(5) > > -#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(6) > > -#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(7) > > +#define I915_ENGINE_IS_VIRTUAL BIT(4) > > +#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(5) > > +#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(6) > > unsigned int flags; > > > > /* > > @@ -540,12 +539,6 @@ intel_engine_has_semaphores(const struct intel_engine_cs *engine) > > return engine->flags & I915_ENGINE_HAS_SEMAPHORES; > > } > > > > -static inline bool > > -intel_engine_needs_breadcrumb_tasklet(const struct intel_engine_cs *engine) > > -{ > > - return engine->flags & I915_ENGINE_NEEDS_BREADCRUMB_TASKLET; > > -} > > - > > static inline bool > > intel_engine_is_virtual(const struct intel_engine_cs *engine) > > { > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > > index 887f38fb671f..e8c66d868c59 100644 > > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > > @@ -606,7 +606,6 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine) > > } > > engine->set_default_submission = guc_set_default_submission; > > > > - engine->flags |= I915_ENGINE_NEEDS_BREADCRUMB_TASKLET; > > engine->flags |= I915_ENGINE_HAS_PREEMPTION; > > > > /* > > @@ -656,6 +655,7 @@ int intel_guc_submission_setup(struct intel_engine_cs *engine) > > > > tasklet_setup(&engine->sched.tasklet, guc_submission_tasklet); > > __set_bit(I915_SCHED_ACTIVE_BIT, &engine->sched.flags); > > + __set_bit(I915_SCHED_NEEDS_BREADCRUMB_BIT, &engine->sched.flags); > > Bah here my idea from earlier falls apart a bit. Don't know. On the positive side, we've eliminated this patch by moving the irq_handler to the engine! -Chris
diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h index ca3a9cb06328..db5419ba1dc8 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine.h +++ b/drivers/gpu/drm/i915/gt/intel_engine.h @@ -285,4 +285,10 @@ intel_engine_has_timeslices(struct intel_engine_cs *engine) return i915_sched_has_timeslices(intel_engine_get_scheduler(engine)); } +static inline bool +intel_engine_needs_breadcrumb_tasklet(struct intel_engine_cs *engine) +{ + return i915_sched_needs_breadcrumb_tasklet(intel_engine_get_scheduler(engine)); +} + #endif /* _INTEL_RINGBUFFER_H_ */ diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h index 96a0aec29672..f856bd9b7dae 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -442,10 +442,9 @@ struct intel_engine_cs { #define I915_ENGINE_SUPPORTS_STATS BIT(1) #define I915_ENGINE_HAS_PREEMPTION BIT(2) #define I915_ENGINE_HAS_SEMAPHORES BIT(3) -#define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(4) -#define I915_ENGINE_IS_VIRTUAL BIT(5) -#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(6) -#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(7) +#define I915_ENGINE_IS_VIRTUAL BIT(4) +#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(5) +#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(6) unsigned int flags; /* @@ -540,12 +539,6 @@ intel_engine_has_semaphores(const struct intel_engine_cs *engine) return engine->flags & I915_ENGINE_HAS_SEMAPHORES; } -static inline bool -intel_engine_needs_breadcrumb_tasklet(const struct intel_engine_cs *engine) -{ - return engine->flags & I915_ENGINE_NEEDS_BREADCRUMB_TASKLET; -} - static inline bool intel_engine_is_virtual(const struct intel_engine_cs *engine) { diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 887f38fb671f..e8c66d868c59 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -606,7 +606,6 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine) } engine->set_default_submission = guc_set_default_submission; - engine->flags |= I915_ENGINE_NEEDS_BREADCRUMB_TASKLET; engine->flags |= I915_ENGINE_HAS_PREEMPTION; /* @@ -656,6 +655,7 @@ int intel_guc_submission_setup(struct intel_engine_cs *engine) tasklet_setup(&engine->sched.tasklet, guc_submission_tasklet); __set_bit(I915_SCHED_ACTIVE_BIT, &engine->sched.flags); + __set_bit(I915_SCHED_NEEDS_BREADCRUMB_BIT, &engine->sched.flags); guc_default_vfuncs(engine); guc_default_irqs(engine); diff --git a/drivers/gpu/drm/i915/i915_scheduler_types.h b/drivers/gpu/drm/i915/i915_scheduler_types.h index dfb29b8c2bee..b4a0e4e26bfd 100644 --- a/drivers/gpu/drm/i915/i915_scheduler_types.h +++ b/drivers/gpu/drm/i915/i915_scheduler_types.h @@ -20,6 +20,7 @@ struct i915_request; enum { I915_SCHED_ACTIVE_BIT = 0, I915_SCHED_HAS_TIMESLICES_BIT, + I915_SCHED_NEEDS_BREADCRUMB_BIT, }; /** @@ -194,4 +195,10 @@ static inline bool i915_sched_has_timeslices(const struct i915_sched *se) return test_bit(I915_SCHED_HAS_TIMESLICES_BIT, &se->flags); } +static inline bool +i915_sched_needs_breadcrumb_tasklet(const struct i915_sched *se) +{ + return test_bit(I915_SCHED_NEEDS_BREADCRUMB_BIT, &se->flags); +} + #endif /* _I915_SCHEDULER_TYPES_H_ */
Whether the scheduler depends on interrupt delivery for forward progress is a property of the scheduler backend not of the underlying engine, so move the flag from inside the engine to i915_sched_engine. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gt/intel_engine.h | 6 ++++++ drivers/gpu/drm/i915/gt/intel_engine_types.h | 13 +++---------- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +- drivers/gpu/drm/i915/i915_scheduler_types.h | 7 +++++++ 4 files changed, 17 insertions(+), 11 deletions(-)