From patchwork Mon Feb 8 10:52:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 12074877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24053C433E6 for ; Mon, 8 Feb 2021 10:53:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ADD0E64E45 for ; Mon, 8 Feb 2021 10:53:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ADD0E64E45 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=chris-wilson.co.uk Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 502556E877; Mon, 8 Feb 2021 10:53:06 +0000 (UTC) Received: from fireflyinternet.com (unknown [77.68.26.236]) by gabe.freedesktop.org (Postfix) with ESMTPS id 418126E869 for ; Mon, 8 Feb 2021 10:52:56 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.69.177; Received: from build.alporthouse.com (unverified [78.156.69.177]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 23809229-1500050 for multiple; Mon, 08 Feb 2021 10:52:44 +0000 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Mon, 8 Feb 2021 10:52:27 +0000 Message-Id: <20210208105236.28498-22-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210208105236.28498-1-chris@chris-wilson.co.uk> References: <20210208105236.28498-1-chris@chris-wilson.co.uk> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 22/31] drm/i915/selftests: Exercise relative timeline modes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Wilson Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" A quick test to verify that the backend accepts each type of timeline and can use them to track and control request emission. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/selftest_timeline.c | 105 ++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c index 6b412228a6fd..dcc03522b277 100644 --- a/drivers/gpu/drm/i915/gt/selftest_timeline.c +++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c @@ -1364,9 +1364,114 @@ static int live_hwsp_recycle(void *arg) return err; } +static int live_hwsp_relative(void *arg) +{ + struct intel_gt *gt = arg; + struct intel_engine_cs *engine; + enum intel_engine_id id; + + /* + * Check backend support for different timeline modes. + */ + + for_each_engine(engine, gt, id) { + enum intel_timeline_mode mode; + + if (!intel_engine_has_scheduler(engine)) + continue; + + for (mode = INTEL_TIMELINE_ABSOLUTE; + mode <= INTEL_TIMELINE_RELATIVE_ENGINE; + mode++) { + struct intel_timeline *tl; + struct i915_request *rq; + struct intel_context *ce; + const char *msg; + int err; + + if (mode == INTEL_TIMELINE_RELATIVE_CONTEXT && + !HAS_EXECLISTS(gt->i915)) + continue; + + ce = intel_context_create(engine); + if (IS_ERR(ce)) + return PTR_ERR(ce); + + err = intel_context_alloc_state(ce); + if (err) { + intel_context_put(ce); + return err; + } + + switch (mode) { + case INTEL_TIMELINE_ABSOLUTE: + tl = intel_timeline_create(gt); + msg = "local"; + break; + + case INTEL_TIMELINE_RELATIVE_CONTEXT: + tl = __intel_timeline_create(gt, + ce->state, + INTEL_TIMELINE_RELATIVE_CONTEXT | + 0x400); + msg = "ppHWSP"; + break; + + case INTEL_TIMELINE_RELATIVE_ENGINE: + tl = __intel_timeline_create(gt, + engine->status_page.vma, + 0x400); + msg = "HWSP"; + break; + default: + continue; + } + if (IS_ERR(tl)) { + intel_context_put(ce); + return PTR_ERR(tl); + } + + pr_info("Testing %s timeline on %s\n", + msg, engine->name); + + intel_timeline_put(ce->timeline); + ce->timeline = tl; + + err = intel_timeline_pin(tl, NULL); + if (err) { + intel_context_put(ce); + return err; + } + tl->seqno = 0xc0000000; + WRITE_ONCE(*(u32 *)tl->hwsp_seqno, tl->seqno); + intel_timeline_unpin(tl); + + rq = intel_context_create_request(ce); + intel_context_put(ce); + if (IS_ERR(rq)) + return PTR_ERR(rq); + + GEM_BUG_ON(rcu_access_pointer(rq->timeline) != tl); + + i915_request_get(rq); + i915_request_add(rq); + + if (i915_request_wait(rq, 0, HZ / 5) < 0) { + i915_request_put(rq); + return -EIO; + } + + i915_request_put(rq); + } + } + + return 0; +} + int intel_timeline_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { + SUBTEST(live_hwsp_relative), SUBTEST(live_hwsp_recycle), SUBTEST(live_hwsp_engine), SUBTEST(live_hwsp_alternate),