From patchwork Fri Mar 5 15:36:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 12118755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5AF1C433DB for ; Fri, 5 Mar 2021 15:36:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E44E6508F for ; Fri, 5 Mar 2021 15:36:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9E44E6508F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 478726EBF6; Fri, 5 Mar 2021 15:36:29 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id F22FA6EBD0 for ; Fri, 5 Mar 2021 15:36:27 +0000 (UTC) IronPort-SDR: 6KsMTt0S8udd+27w0WUBF8GoyWnLYOkbM3c/704sAnpvj1uJ80T/qYcKFacvnz0qVKCEXeUYQq pBr77aDwSPVA== X-IronPort-AV: E=McAfee;i="6000,8403,9914"; a="249055569" X-IronPort-AV: E=Sophos;i="5.81,225,1610438400"; d="scan'208";a="249055569" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2021 07:36:26 -0800 IronPort-SDR: pMSpQFssteXIb2x+1Lp4cen/ZD/rXX9d210c0U/vrmLUbKGWOXeR4fq5Iga4qgzjdByIJdXVsm blIR1B/0L/0Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,225,1610438400"; d="scan'208";a="401714660" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by fmsmga008.fm.intel.com with SMTP; 05 Mar 2021 07:36:20 -0800 Received: by stinkbox (sSMTP sendmail emulation); Fri, 05 Mar 2021 17:36:19 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Fri, 5 Mar 2021 17:36:07 +0200 Message-Id: <20210305153610.12177-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210305153610.12177-1-ville.syrjala@linux.intel.com> References: <20210305153610.12177-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/6] drm/i915: Check SAGV wm min_ddb_alloc rather than plane_res_b X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä For non-transition watermarks we are supposed to check min_ddb_alloc rather than plane_res_b when determining if we have enough DDB space for it. A bit too much copy pasta made me check the wrong thing. Cc: Stanislav Lisovskiy Fixes: df4a50a35e2c ("drm/i915: Zero out SAGV wm when we don't have enough DDB for it") Signed-off-by: Ville Syrjälä Reviewed-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b6e34d1701a0..36601e0a5073 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4989,7 +4989,7 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state, if (wm->trans_wm.plane_res_b >= total[plane_id]) memset(&wm->trans_wm, 0, sizeof(wm->trans_wm)); - if (wm->sagv.wm0.plane_res_b >= total[plane_id]) + if (wm->sagv.wm0.min_ddb_alloc > total[plane_id]) memset(&wm->sagv.wm0, 0, sizeof(wm->sagv.wm0)); if (wm->sagv.trans_wm.plane_res_b >= total[plane_id])