From patchwork Wed Mar 10 19:43:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 12129231 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BA10C433DB for ; Wed, 10 Mar 2021 19:43:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C86ED64FB5 for ; Wed, 10 Mar 2021 19:43:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C86ED64FB5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 58D0B6E2DC; Wed, 10 Mar 2021 19:43:56 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id D56FF6E2DC for ; Wed, 10 Mar 2021 19:43:54 +0000 (UTC) IronPort-SDR: QAn2lsgErTwTQJXVR7dOssy0aa8iT0kqcYxr0kVywmcMoa8jdzKhqV4NAplxb4JHWberGZrxiW 8dCZwWmIA98w== X-IronPort-AV: E=McAfee;i="6000,8403,9919"; a="167824553" X-IronPort-AV: E=Sophos;i="5.81,238,1610438400"; d="scan'208";a="167824553" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2021 11:43:54 -0800 IronPort-SDR: E6XgrSLxpJ1nw6Bn3G30MBOTmgas64fw6BUJtb98ay6Ol7Yg7F09dQI0EEXDPv5EoB18zaH+qr mSNkV4PX4mYw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,238,1610438400"; d="scan'208";a="386754306" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by orsmga002.jf.intel.com with SMTP; 10 Mar 2021 11:43:52 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 10 Mar 2021 21:43:51 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 10 Mar 2021 21:43:51 +0200 Message-Id: <20210310194351.6233-1-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Tolerate bogus DPLL selection X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Let's check that we actually found the PLL before doing the port_clock readout, just in case the hardware is severly misprogramming by the previous guy. Not sure the hw would even survive such misprogramming without hanging but no real harm in checking anyway. Cc: Karthik B S Signed-off-by: Ville Syrjälä Reviewed-by: Karthik B S --- drivers/gpu/drm/i915/display/intel_ddi.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index ba83682e1d3e..64a952db8528 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3716,6 +3716,9 @@ void intel_ddi_get_clock(struct intel_encoder *encoder, struct icl_port_dpll *port_dpll = &crtc_state->icl_port_dplls[port_dpll_id]; bool pll_active; + if (drm_WARN_ON(&i915->drm, !pll)) + return; + port_dpll->pll = pll; pll_active = intel_dpll_get_hw_state(i915, pll, &port_dpll->hw_state); drm_WARN_ON(&i915->drm, !pll_active); @@ -3754,16 +3757,17 @@ static void icl_ddi_combo_get_config(struct intel_encoder *encoder, intel_ddi_get_config(encoder, crtc_state); } -static void icl_ddi_tc_get_config(struct intel_encoder *encoder, - struct intel_crtc_state *crtc_state) +static void icl_ddi_tc_get_clock(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state, + struct intel_shared_dpll *pll) { struct drm_i915_private *i915 = to_i915(encoder->base.dev); enum icl_port_dpll_id port_dpll_id; struct icl_port_dpll *port_dpll; - struct intel_shared_dpll *pll; bool pll_active; - pll = icl_ddi_tc_get_pll(encoder); + if (drm_WARN_ON(&i915->drm, !pll)) + return; if (intel_get_shared_dpll_id(i915, pll) == DPLL_ID_ICL_TBTPLL) port_dpll_id = ICL_PORT_DPLL_DEFAULT; @@ -3783,7 +3787,12 @@ static void icl_ddi_tc_get_config(struct intel_encoder *encoder, else crtc_state->port_clock = intel_dpll_get_freq(i915, crtc_state->shared_dpll, &crtc_state->dpll_hw_state); +} +static void icl_ddi_tc_get_config(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state) +{ + icl_ddi_tc_get_clock(encoder, crtc_state, icl_ddi_tc_get_pll(encoder)); intel_ddi_get_config(encoder, crtc_state); }