From patchwork Thu Mar 11 22:35:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 12133033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D7EFC433DB for ; Thu, 11 Mar 2021 22:36:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 312B864F26 for ; Thu, 11 Mar 2021 22:36:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 312B864F26 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B03D6EE98; Thu, 11 Mar 2021 22:36:48 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 05EC86EE87 for ; Thu, 11 Mar 2021 22:36:45 +0000 (UTC) IronPort-SDR: aCNIJ44tR7zLt5E7i/CQ3gW0x3tLOJ8jOQZHCpi7JAGG/wl6GNExoLvjI+igL408rU+SUY/cJT M9z3KwrC77YQ== X-IronPort-AV: E=McAfee;i="6000,8403,9920"; a="185395073" X-IronPort-AV: E=Sophos;i="5.81,241,1610438400"; d="scan'208";a="185395073" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Mar 2021 14:36:44 -0800 IronPort-SDR: XYhK8LfygICoITyJeNxycWEJlku+U86+HDF9gF9REsTddrD6FV/n8NRFPxuDQj3540pNn0NQel KRVqb8pa+kHg== X-IronPort-AV: E=Sophos;i="5.81,241,1610438400"; d="scan'208";a="438852680" Received: from mdroper-desk1.fm.intel.com ([10.1.27.168]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Mar 2021 14:36:44 -0800 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Mar 2021 14:35:48 -0800 Message-Id: <20210311223632.3191939-13-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20210311223632.3191939-1-matthew.d.roper@intel.com> References: <20210311223632.3191939-1-matthew.d.roper@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 12/56] drm/i915/xelpd: Handle new location of outputs D and E X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The DDI naming template for display version 12 went A-C, TC1-TC6. With XE_LPD, that naming scheme for DDI's has now changed to A-E, TC1-TC4. The XE_LPD design keeps the register offsets and bitfields relating to the TC outputs in the same location they were previously. The new "D" and "E" outputs now take the locations that were previously used by TC5 and TC6 outputs, or what we would have considered to be outputs "H" and "I" under the legacy lettering scheme. For the most part everything will just work as long as we initialize the output with the proper 'enum port' value. However we do need to take care to pick the correct AUX channel when parsing the VBT (e.g., a reference to 'AUX D' is actually asking us to use the 8th aux channel, not the fourth). We should also make sure that our encoders and aux channels are named appropriately so that it's easier to correlate driver debug messages with the bspec instructions. v2: - Update handling of TGL_TRANS_CLK_SEL_PORT. (Jose) Cc: José Roberto de Souza Cc: Ville Syrjälä Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_bios.c | 8 +++++-- drivers/gpu/drm/i915/display/intel_ddi.c | 25 +++++++++++++------- drivers/gpu/drm/i915/display/intel_display.c | 6 ++++- drivers/gpu/drm/i915/display/intel_display.h | 8 +++++++ drivers/gpu/drm/i915/display/intel_dp_aux.c | 14 +++++++---- 5 files changed, 44 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 7d438d16973c..e4cef54726b4 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2770,7 +2770,9 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, aux_ch = AUX_CH_C; break; case DP_AUX_D: - if (IS_ALDERLAKE_S(dev_priv)) + if (DISPLAY_VER(dev_priv) >= 13) + aux_ch = AUX_CH_D_XELPD; + else if (IS_ALDERLAKE_S(dev_priv)) aux_ch = AUX_CH_USBC3; else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) aux_ch = AUX_CH_USBC2; @@ -2778,7 +2780,9 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, aux_ch = AUX_CH_D; break; case DP_AUX_E: - if (IS_ALDERLAKE_S(dev_priv)) + if (DISPLAY_VER(dev_priv) >= 13) + aux_ch = AUX_CH_E_XELPD; + else if (IS_ALDERLAKE_S(dev_priv)) aux_ch = AUX_CH_USBC4; else aux_ch = AUX_CH_E; diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 9e677220f276..f404547bb95a 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -850,18 +850,19 @@ void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder, { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - enum port port = encoder->port; enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + enum phy phy = intel_port_to_phy(dev_priv, encoder->port); + u32 val; if (cpu_transcoder != TRANSCODER_EDP) { - if (DISPLAY_VER(dev_priv) >= 12) - intel_de_write(dev_priv, - TRANS_CLK_SEL(cpu_transcoder), - TGL_TRANS_CLK_SEL_PORT(port)); + if (DISPLAY_VER(dev_priv) >= 13) + val = TGL_TRANS_CLK_SEL_PORT(phy); + else if (DISPLAY_VER(dev_priv) >= 12) + val = TGL_TRANS_CLK_SEL_PORT(encoder->port); else - intel_de_write(dev_priv, - TRANS_CLK_SEL(cpu_transcoder), - TRANS_CLK_SEL_PORT(port)); + val = TRANS_CLK_SEL_PORT(encoder->port); + + intel_de_write(dev_priv, TRANS_CLK_SEL(cpu_transcoder), val); } } @@ -4461,7 +4462,13 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) encoder = &dig_port->base; - if (DISPLAY_VER(dev_priv) >= 12) { + if (DISPLAY_VER(dev_priv) >= 13 && port >= PORT_D_XELPD) { + drm_encoder_init(&dev_priv->drm, &encoder->base, &intel_ddi_funcs, + DRM_MODE_ENCODER_TMDS, + "DDI %c/PHY %c", + port_name(port - PORT_D_XELPD + PORT_D), + phy_name(phy)); + } else if (DISPLAY_VER(dev_priv) >= 12) { enum tc_port tc_port = intel_port_to_tc(dev_priv, port); drm_encoder_init(&dev_priv->drm, &encoder->base, &intel_ddi_funcs, diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 10cedd4d6828..926707fd00e3 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4174,7 +4174,11 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy) enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port) { - if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1) + if (DISPLAY_VER(i915) >= 13 && port >= PORT_D_XELPD) + return PHY_D + port - PORT_D_XELPD; + else if (DISPLAY_VER(i915) >= 13 && port >= PORT_TC1) + return PHY_F + port - PORT_TC1; + else if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1) return PHY_B + port - PORT_TC1; else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) return PHY_C + port - PORT_TC1; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 431770eeadb4..13d5d7909411 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -217,6 +217,10 @@ enum port { PORT_TC5, PORT_TC6, + /* XE_LPD repositions D/E offsets and bitfields */ + PORT_D_XELPD = PORT_TC5, + PORT_E_XELPD, + I915_MAX_PORTS }; @@ -300,6 +304,10 @@ enum aux_ch { AUX_CH_USBC4, AUX_CH_USBC5, AUX_CH_USBC6, + + /* XE_LPD repositions D/E offsets and bitfields */ + AUX_CH_D_XELPD = AUX_CH_USBC5, + AUX_CH_E_XELPD, }; #define aux_ch_name(a) ((a) + 'A') diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c index b7eee37d040a..42eaf6acc9c4 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c @@ -600,8 +600,8 @@ static i915_reg_t tgl_aux_ctl_reg(struct intel_dp *intel_dp) case AUX_CH_USBC2: case AUX_CH_USBC3: case AUX_CH_USBC4: - case AUX_CH_USBC5: - case AUX_CH_USBC6: + case AUX_CH_USBC5: /* aka AUX_CH_D_XELPD */ + case AUX_CH_USBC6: /* aka AUX_CH_E_XELPD */ return DP_AUX_CH_CTL(aux_ch); default: MISSING_CASE(aux_ch); @@ -623,8 +623,8 @@ static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index) case AUX_CH_USBC2: case AUX_CH_USBC3: case AUX_CH_USBC4: - case AUX_CH_USBC5: - case AUX_CH_USBC6: + case AUX_CH_USBC5: /* aka AUX_CH_D_XELPD */ + case AUX_CH_USBC6: /* aka AUX_CH_E_XELPD */ return DP_AUX_CH_DATA(aux_ch, index); default: MISSING_CASE(aux_ch); @@ -678,7 +678,11 @@ void intel_dp_aux_init(struct intel_dp *intel_dp) drm_dp_aux_init(&intel_dp->aux); /* Failure to allocate our preferred name is not critical */ - if (DISPLAY_VER(dev_priv) >= 12 && aux_ch >= AUX_CH_USBC1) + if (DISPLAY_VER(dev_priv) >= 13 && aux_ch >= AUX_CH_D_XELPD) + intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX %c/%s", + aux_ch_name(aux_ch - AUX_CH_D_XELPD + AUX_CH_D), + encoder->base.name); + else if (DISPLAY_VER(dev_priv) >= 12 && aux_ch >= AUX_CH_USBC1) intel_dp->aux.name = kasprintf(GFP_KERNEL, "AUX USBC%c/%s", aux_ch - AUX_CH_USBC1 + '1', encoder->base.name);