diff mbox series

[08/56] drm/i915/xelpd: Handle proper AUX interrupt bits

Message ID 20210311223632.3191939-9-matthew.d.roper@intel.com (mailing list archive)
State New, archived
Headers show
Series Introduce Alder Lake-P | expand

Commit Message

Matt Roper March 11, 2021, 10:35 p.m. UTC
XE_LPD has new AUX interrupt bits for DDI-D and DDI-E that take the
spots that were used by TC5/TC6 on Display12 platforms.

While we're at it, let's convert the bit definitions for all TGL+ aux
bits over to the modern REG_BIT() notation.

v2:
 - Maintain bit order rather than logical order.  (Lucas)
 - Convert surrounding code to REG_BIT() notation.  (Lucas)

Bspec: 50064
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 12 +++++++++++-
 drivers/gpu/drm/i915/i915_reg.h | 20 +++++++++++---------
 2 files changed, 22 insertions(+), 10 deletions(-)

Comments

Srivatsa, Anusha March 12, 2021, 10:41 p.m. UTC | #1
> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@intel.com>
> Sent: Thursday, March 11, 2021 2:36 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Roper, Matthew D <matthew.d.roper@intel.com>; Srivatsa, Anusha
> <anusha.srivatsa@intel.com>; De Marchi, Lucas
> <lucas.demarchi@intel.com>
> Subject: [PATCH 08/56] drm/i915/xelpd: Handle proper AUX interrupt bits
> 
> XE_LPD has new AUX interrupt bits for DDI-D and DDI-E that take the spots
> that were used by TC5/TC6 on Display12 platforms.
> 
> While we're at it, let's convert the bit definitions for all TGL+ aux bits over to
> the modern REG_BIT() notation.
> 
> v2:
>  - Maintain bit order rather than logical order.  (Lucas)
>  - Convert surrounding code to REG_BIT() notation.  (Lucas)
> 
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> Bspec: 50064
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 12 +++++++++++-
> drivers/gpu/drm/i915/i915_reg.h | 20 +++++++++++---------
>  2 files changed, 22 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c index 23be88d59055..c9e03973502c
> 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2269,7 +2269,17 @@ static u32 gen8_de_port_aux_mask(struct
> drm_i915_private *dev_priv)  {
>  	u32 mask;
> 
> -	if (DISPLAY_VER(dev_priv) >= 12)
> +	if (DISPLAY_VER(dev_priv) >= 13)
> +		return TGL_DE_PORT_AUX_DDIA |
> +			TGL_DE_PORT_AUX_DDIB |
> +			TGL_DE_PORT_AUX_DDIC |
> +			XELPD_DE_PORT_AUX_DDID |
> +			XELPD_DE_PORT_AUX_DDIE |
> +			TGL_DE_PORT_AUX_USBC1 |
> +			TGL_DE_PORT_AUX_USBC2 |
> +			TGL_DE_PORT_AUX_USBC3 |
> +			TGL_DE_PORT_AUX_USBC4;
> +	else if (DISPLAY_VER(dev_priv) >= 12)
>  		return TGL_DE_PORT_AUX_DDIA |
>  			TGL_DE_PORT_AUX_DDIB |
>  			TGL_DE_PORT_AUX_DDIC |
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h index e5dd0203991b..475d14db2844
> 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7855,15 +7855,17 @@ enum {
>  #define  BDW_DE_PORT_HOTPLUG_MASK
> 	GEN8_DE_PORT_HOTPLUG(HPD_PORT_A)
>  #define  BXT_DE_PORT_GMBUS		(1 << 1)
>  #define  GEN8_AUX_CHANNEL_A		(1 << 0)
> -#define  TGL_DE_PORT_AUX_USBC6		(1 << 13)
> -#define  TGL_DE_PORT_AUX_USBC5		(1 << 12)
> -#define  TGL_DE_PORT_AUX_USBC4		(1 << 11)
> -#define  TGL_DE_PORT_AUX_USBC3		(1 << 10)
> -#define  TGL_DE_PORT_AUX_USBC2		(1 << 9)
> -#define  TGL_DE_PORT_AUX_USBC1		(1 << 8)
> -#define  TGL_DE_PORT_AUX_DDIC		(1 << 2)
> -#define  TGL_DE_PORT_AUX_DDIB		(1 << 1)
> -#define  TGL_DE_PORT_AUX_DDIA		(1 << 0)
> +#define  TGL_DE_PORT_AUX_USBC6		REG_BIT(13)
> +#define  XELPD_DE_PORT_AUX_DDIE		REG_BIT(13)
> +#define  TGL_DE_PORT_AUX_USBC5		REG_BIT(12)
> +#define  XELPD_DE_PORT_AUX_DDID		REG_BIT(12)
> +#define  TGL_DE_PORT_AUX_USBC4		REG_BIT(11)
> +#define  TGL_DE_PORT_AUX_USBC3		REG_BIT(10)
> +#define  TGL_DE_PORT_AUX_USBC2		REG_BIT(9)
> +#define  TGL_DE_PORT_AUX_USBC1		REG_BIT(8)
> +#define  TGL_DE_PORT_AUX_DDIC		REG_BIT(2)
> +#define  TGL_DE_PORT_AUX_DDIB		REG_BIT(1)
> +#define  TGL_DE_PORT_AUX_DDIA		REG_BIT(0)
> 
>  #define GEN8_DE_MISC_ISR _MMIO(0x44460)  #define GEN8_DE_MISC_IMR
> _MMIO(0x44464)
> --
> 2.25.4
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 23be88d59055..c9e03973502c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2269,7 +2269,17 @@  static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
 {
 	u32 mask;
 
-	if (DISPLAY_VER(dev_priv) >= 12)
+	if (DISPLAY_VER(dev_priv) >= 13)
+		return TGL_DE_PORT_AUX_DDIA |
+			TGL_DE_PORT_AUX_DDIB |
+			TGL_DE_PORT_AUX_DDIC |
+			XELPD_DE_PORT_AUX_DDID |
+			XELPD_DE_PORT_AUX_DDIE |
+			TGL_DE_PORT_AUX_USBC1 |
+			TGL_DE_PORT_AUX_USBC2 |
+			TGL_DE_PORT_AUX_USBC3 |
+			TGL_DE_PORT_AUX_USBC4;
+	else if (DISPLAY_VER(dev_priv) >= 12)
 		return TGL_DE_PORT_AUX_DDIA |
 			TGL_DE_PORT_AUX_DDIB |
 			TGL_DE_PORT_AUX_DDIC |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e5dd0203991b..475d14db2844 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7855,15 +7855,17 @@  enum {
 #define  BDW_DE_PORT_HOTPLUG_MASK	GEN8_DE_PORT_HOTPLUG(HPD_PORT_A)
 #define  BXT_DE_PORT_GMBUS		(1 << 1)
 #define  GEN8_AUX_CHANNEL_A		(1 << 0)
-#define  TGL_DE_PORT_AUX_USBC6		(1 << 13)
-#define  TGL_DE_PORT_AUX_USBC5		(1 << 12)
-#define  TGL_DE_PORT_AUX_USBC4		(1 << 11)
-#define  TGL_DE_PORT_AUX_USBC3		(1 << 10)
-#define  TGL_DE_PORT_AUX_USBC2		(1 << 9)
-#define  TGL_DE_PORT_AUX_USBC1		(1 << 8)
-#define  TGL_DE_PORT_AUX_DDIC		(1 << 2)
-#define  TGL_DE_PORT_AUX_DDIB		(1 << 1)
-#define  TGL_DE_PORT_AUX_DDIA		(1 << 0)
+#define  TGL_DE_PORT_AUX_USBC6		REG_BIT(13)
+#define  XELPD_DE_PORT_AUX_DDIE		REG_BIT(13)
+#define  TGL_DE_PORT_AUX_USBC5		REG_BIT(12)
+#define  XELPD_DE_PORT_AUX_DDID		REG_BIT(12)
+#define  TGL_DE_PORT_AUX_USBC4		REG_BIT(11)
+#define  TGL_DE_PORT_AUX_USBC3		REG_BIT(10)
+#define  TGL_DE_PORT_AUX_USBC2		REG_BIT(9)
+#define  TGL_DE_PORT_AUX_USBC1		REG_BIT(8)
+#define  TGL_DE_PORT_AUX_DDIC		REG_BIT(2)
+#define  TGL_DE_PORT_AUX_DDIB		REG_BIT(1)
+#define  TGL_DE_PORT_AUX_DDIA		REG_BIT(0)
 
 #define GEN8_DE_MISC_ISR _MMIO(0x44460)
 #define GEN8_DE_MISC_IMR _MMIO(0x44464)