| Message ID | 20210319043701.14105-1-unixbhaskar@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: i915: Fix a typo | expand |
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index f6ad257a260e..14d784a6fae5 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -4185,7 +4185,7 @@ static void icl_pll_disable(struct drm_i915_private *dev_priv, /* * DVFS pre sequence would be here, but in our driver the cdclk code * paths should already be setting the appropriate voltage, hence we do - * nothign here. + * nothing here. */ val = intel_de_read(dev_priv, enable_reg);
s/nothign/nothing/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> --- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.26.2