From patchwork Thu Mar 25 18:06:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 12164767 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DC0DC433E1 for ; Thu, 25 Mar 2021 18:07:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 51F2A619CB for ; Thu, 25 Mar 2021 18:07:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 51F2A619CB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B42A6EE17; Thu, 25 Mar 2021 18:07:32 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id CB0E86EDDF for ; Thu, 25 Mar 2021 18:07:28 +0000 (UTC) IronPort-SDR: 8bch60whsvmtZr10bdht+kV1+Iwr7XhAcnhR3WH+Ca6HVtDPOV4a5Hslox5Q8czfvJZWBREkqm bUgzmv+UhB4g== X-IronPort-AV: E=McAfee;i="6000,8403,9934"; a="276113761" X-IronPort-AV: E=Sophos;i="5.81,278,1610438400"; d="scan'208";a="276113761" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2021 11:07:28 -0700 IronPort-SDR: c7znUIxQdJnoxY/Ore+mUsNJhcck7JowOPIboOCPGf/UK49AItFqOGSwlu4QZLhzUDueaGQmOG CHo1jqk+Y19A== X-IronPort-AV: E=Sophos;i="5.81,278,1610438400"; d="scan'208";a="453176548" Received: from mdroper-desk1.fm.intel.com ([10.1.27.168]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2021 11:07:28 -0700 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Thu, 25 Mar 2021 11:06:38 -0700 Message-Id: <20210325180720.401410-9-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20210325180720.401410-1-matthew.d.roper@intel.com> References: <20210325180720.401410-1-matthew.d.roper@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 08/50] drm/i915/xelpd: Handle LPSP for XE_LPD X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: me@freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Uma Shankar Enable LPSP for XE_LPD and get the proper power well enable check in place. For XE_LPD it is PW2 which need to check for LPSP. v2: - Move the XE_LPD check outside of the switch. (Lucas) Cc: Anshuman Gupta Cc: Animesh Manna Cc: Matt Roper Cc: Lucas De Marchi Suggested-by: Matt Roper Signed-off-by: Uma Shankar Signed-off-by: Anshuman Gupta Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 564509a4e666..d5956c329745 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -1339,6 +1339,12 @@ static int i915_lpsp_status(struct seq_file *m, void *unused) { struct drm_i915_private *i915 = node_to_i915(m->private); + if (DISPLAY_VER(i915) >= 13) { + LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, + SKL_DISP_PW_2)); + return 0; + } + switch (DISPLAY_VER(i915)) { case 12: case 11: