diff mbox series

[1/2] drm/i915: Fix modesetting in case of unexpected AUX timeouts

Message ID 20210412232413.2755054-1-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/2] drm/i915: Fix modesetting in case of unexpected AUX timeouts | expand

Commit Message

Imre Deak April 12, 2021, 11:24 p.m. UTC
In case AUX failures happen unexpectedly during a modeset, the driver
should still complete the modeset. In particular the driver should
perform the link training sequence steps even in case of an AUX failure,
as this sequence also includes port initialization steps. Not doing that
can leave the port/pipe in a broken state and lead for instance to a
flip done timeout.

Fix this by continuing with link training (in a no-LTTPR mode) if the
DPRX DPCD readout failed for some reason at the beginning of link
training. After a successful connector detection we already have the
DPCD read out and cached, so the failed repeated read for it should not
cause a problem. Note that a partial AUX read could in theory partly
overwrite the cached DPCD (and return error) but this overwrite should
not happen if the returned values are corrupted (due to a timeout or
some other IO error).

Kudos to Ville to root cause the problem.

Fixes: 7dffbdedb96a ("drm/i915: Disable LTTPR support when the DPCD rev < 1.4")
References: https://gitlab.freedesktop.org/drm/intel/-/issues/3308
Cc: stable@vger.kernel.org # 5.11
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_link_training.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Ville Syrjälä April 13, 2021, 5:12 p.m. UTC | #1
On Tue, Apr 13, 2021 at 02:24:12AM +0300, Imre Deak wrote:
> In case AUX failures happen unexpectedly during a modeset, the driver
> should still complete the modeset. In particular the driver should
> perform the link training sequence steps even in case of an AUX failure,
> as this sequence also includes port initialization steps. Not doing that
> can leave the port/pipe in a broken state and lead for instance to a
> flip done timeout.
> 
> Fix this by continuing with link training (in a no-LTTPR mode) if the
> DPRX DPCD readout failed for some reason at the beginning of link
> training. After a successful connector detection we already have the
> DPCD read out and cached, so the failed repeated read for it should not
> cause a problem. Note that a partial AUX read could in theory partly
> overwrite the cached DPCD (and return error) but this overwrite should
> not happen if the returned values are corrupted (due to a timeout or
> some other IO error).
> 
> Kudos to Ville to root cause the problem.
> 
> Fixes: 7dffbdedb96a ("drm/i915: Disable LTTPR support when the DPCD rev < 1.4")
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/3308
> Cc: stable@vger.kernel.org # 5.11
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp_link_training.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 5e9c3c74310ca..cbcfb0c4c3708 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -882,7 +882,8 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
>  	int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
>  
>  	if (lttpr_count < 0)
> -		return;
> +		/* Still continue with enabling the port and link training. */
> +		lttpr_count = 0;
>  
>  	if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
>  		intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
> -- 
> 2.27.0
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 5e9c3c74310ca..cbcfb0c4c3708 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -882,7 +882,8 @@  void intel_dp_start_link_train(struct intel_dp *intel_dp,
 	int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
 
 	if (lttpr_count < 0)
-		return;
+		/* Still continue with enabling the port and link training. */
+		lttpr_count = 0;
 
 	if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
 		intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);