diff mbox series

[v2,07/12] drm/i915/selftests: eliminate use of gen_mask

Message ID 20210413051002.92589-8-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Extend GEN renames to the rest of the driver | expand

Commit Message

Lucas De Marchi April 13, 2021, 5:09 a.m. UTC
Remove the remaining uses of INTEL_GEN_MASK() and the correspondent
gen_mask in struct intel_device_info. This will allow the removal of
gen_mask later since it's incompatible with the new per-IP versioning
scheme.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c           | 8 +++++---
 drivers/gpu/drm/i915/selftests/intel_uncore.c | 8 +++++---
 2 files changed, 10 insertions(+), 6 deletions(-)

Comments

Jani Nikula April 13, 2021, 9:38 a.m. UTC | #1
On Mon, 12 Apr 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> Remove the remaining uses of INTEL_GEN_MASK() and the correspondent
> gen_mask in struct intel_device_info. This will allow the removal of
> gen_mask later since it's incompatible with the new per-IP versioning
> scheme.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c           | 8 +++++---
>  drivers/gpu/drm/i915/selftests/intel_uncore.c | 8 +++++---
>  2 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 661b50191f2b..ed5abe7be498 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -2008,12 +2008,14 @@ void intel_uncore_fini_mmio(struct intel_uncore *uncore)
>  static const struct reg_whitelist {
>  	i915_reg_t offset_ldw;
>  	i915_reg_t offset_udw;
> -	u16 gen_mask;
> +	u8 min_graphics_ver;
> +	u8 max_graphics_ver;
>  	u8 size;
>  } reg_read_whitelist[] = { {
>  	.offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
>  	.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
> -	.gen_mask = INTEL_GEN_MASK(4, 12),
> +	.min_graphics_ver = 4,
> +	.max_graphics_ver = 12,
>  	.size = 8
>  } };
>  
> @@ -2038,7 +2040,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
>  		GEM_BUG_ON(entry->size > 8);
>  		GEM_BUG_ON(entry_offset & (entry->size - 1));
>  
> -		if (INTEL_INFO(i915)->gen_mask & entry->gen_mask &&
> +		if (IS_GRAPHICS_VER(i915, entry->min_graphics_ver, entry->max_graphics_ver) &&
>  		    entry_offset == (reg->offset & -entry->size))
>  			break;
>  		entry++;
> diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
> index 0e4e6be0101d..f76c9bcec735 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
> @@ -125,17 +125,19 @@ static int live_forcewake_ops(void *arg)
>  {
>  	static const struct reg {
>  		const char *name;
> +		u8 min_graphics_ver;
> +		u8 max_graphics_ver;
>  		unsigned long platforms;
>  		unsigned int offset;
>  	} registers[] = {
>  		{
>  			"RING_START",
> -			INTEL_GEN_MASK(6, 7),
> +			6, 7,
>  			0x38,
>  		},
>  		{
>  			"RING_MI_MODE",
> -			INTEL_GEN_MASK(8, BITS_PER_LONG),
> +			8, U8_MAX,

Makes me wonder if we should add VER_MAX. Can be done later if needed.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>  			0x9c,
>  		}
>  	};
> @@ -170,7 +172,7 @@ static int live_forcewake_ops(void *arg)
>  
>  	/* We have to pick carefully to get the exact behaviour we need */
>  	for (r = registers; r->name; r++)
> -		if (r->platforms & INTEL_INFO(gt->i915)->gen_mask)
> +		if (IS_GRAPHICS_VER(gt->i915, r->min_graphics_ver, r->max_graphics_ver))
>  			break;
>  	if (!r->name) {
>  		pr_debug("Forcewaked register not known for %s; skipping\n",
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 661b50191f2b..ed5abe7be498 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -2008,12 +2008,14 @@  void intel_uncore_fini_mmio(struct intel_uncore *uncore)
 static const struct reg_whitelist {
 	i915_reg_t offset_ldw;
 	i915_reg_t offset_udw;
-	u16 gen_mask;
+	u8 min_graphics_ver;
+	u8 max_graphics_ver;
 	u8 size;
 } reg_read_whitelist[] = { {
 	.offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
 	.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
-	.gen_mask = INTEL_GEN_MASK(4, 12),
+	.min_graphics_ver = 4,
+	.max_graphics_ver = 12,
 	.size = 8
 } };
 
@@ -2038,7 +2040,7 @@  int i915_reg_read_ioctl(struct drm_device *dev,
 		GEM_BUG_ON(entry->size > 8);
 		GEM_BUG_ON(entry_offset & (entry->size - 1));
 
-		if (INTEL_INFO(i915)->gen_mask & entry->gen_mask &&
+		if (IS_GRAPHICS_VER(i915, entry->min_graphics_ver, entry->max_graphics_ver) &&
 		    entry_offset == (reg->offset & -entry->size))
 			break;
 		entry++;
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 0e4e6be0101d..f76c9bcec735 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -125,17 +125,19 @@  static int live_forcewake_ops(void *arg)
 {
 	static const struct reg {
 		const char *name;
+		u8 min_graphics_ver;
+		u8 max_graphics_ver;
 		unsigned long platforms;
 		unsigned int offset;
 	} registers[] = {
 		{
 			"RING_START",
-			INTEL_GEN_MASK(6, 7),
+			6, 7,
 			0x38,
 		},
 		{
 			"RING_MI_MODE",
-			INTEL_GEN_MASK(8, BITS_PER_LONG),
+			8, U8_MAX,
 			0x9c,
 		}
 	};
@@ -170,7 +172,7 @@  static int live_forcewake_ops(void *arg)
 
 	/* We have to pick carefully to get the exact behaviour we need */
 	for (r = registers; r->name; r++)
-		if (r->platforms & INTEL_INFO(gt->i915)->gen_mask)
+		if (IS_GRAPHICS_VER(gt->i915, r->min_graphics_ver, r->max_graphics_ver))
 			break;
 	if (!r->name) {
 		pr_debug("Forcewaked register not known for %s; skipping\n",