From patchwork Wed Apr 14 02:23:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 12201743 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B63FAC433B4 for ; Wed, 14 Apr 2021 02:23:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7941F610E8 for ; Wed, 14 Apr 2021 02:23:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7941F610E8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 145A86E42D; Wed, 14 Apr 2021 02:23:24 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 75FBF6E42D for ; Wed, 14 Apr 2021 02:23:22 +0000 (UTC) IronPort-SDR: MDxfzlcVfG2+sN7QKW+HzFJbFltmj7+tOPH71ICck89Nj6efzQ1eZLPY2k/0GhihAeDnR5G0Qn xFel0MPtRHIw== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="174652197" X-IronPort-AV: E=Sophos;i="5.82,221,1613462400"; d="scan'208";a="174652197" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 19:23:21 -0700 IronPort-SDR: 9Jfw9ezqoaVcvk1eZZmzrvL96F+Dar25v70dpeD5E0PiNgY5DRSfeNNNeSLusC8W8cfYUckgsI mwvWkPEdrghA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,221,1613462400"; d="scan'208";a="398998603" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by orsmga002.jf.intel.com with SMTP; 13 Apr 2021 19:23:19 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 14 Apr 2021 05:23:18 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 14 Apr 2021 05:23:04 +0300 Message-Id: <20210414022309.30898-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210414022309.30898-1-ville.syrjala@linux.intel.com> References: <20210414022309.30898-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/8] drm/i915: Extract intel_fbc_update() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Pull the fbc enable vs. disable stuff into a small helper so we don't have to have it pollute the higher level modeset code. Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_display.c | 5 +--- drivers/gpu/drm/i915/display/intel_fbc.c | 26 ++++++++++++++++++-- drivers/gpu/drm/i915/display/intel_fbc.h | 2 +- 3 files changed, 26 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 411b46c012f8..a4b8fb5c20f0 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -9799,10 +9799,7 @@ static void intel_update_crtc(struct intel_atomic_state *state, intel_encoders_update_pipe(state, crtc); } - if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc) - intel_fbc_disable(crtc); - else - intel_fbc_enable(state, crtc); + intel_fbc_update(state, crtc); /* Perform vblank evasion around commit operation */ intel_pipe_update_start(new_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 178243a6d3a2..4968e79a6235 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1250,8 +1250,8 @@ void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv, * intel_fbc_enable multiple times for the same pipe without an * intel_fbc_disable in the middle, as long as it is deactivated. */ -void intel_fbc_enable(struct intel_atomic_state *state, - struct intel_crtc *crtc) +static void intel_fbc_enable(struct intel_atomic_state *state, + struct intel_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_plane *plane = to_intel_plane(crtc->base.primary); @@ -1324,6 +1324,28 @@ void intel_fbc_disable(struct intel_crtc *crtc) mutex_unlock(&fbc->lock); } +/** + * intel_fbc_update: enable/disable FBC on the CRTC + * @state: atomic state + * @crtc: the CRTC + * + * This function checks if the given CRTC was chosen for FBC, then enables it if + * possible. Notice that it doesn't activate FBC. It is valid to call + * intel_fbc_update multiple times for the same pipe without an + * intel_fbc_disable in the middle. + */ +void intel_fbc_update(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + const struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + + if (crtc_state->update_pipe && !crtc_state->enable_fbc) + intel_fbc_disable(crtc); + else + intel_fbc_enable(state, crtc); +} + /** * intel_fbc_global_disable - globally disable FBC * @dev_priv: i915 device instance diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h index 6dc1edefe81b..b97d908738e6 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.h +++ b/drivers/gpu/drm/i915/display/intel_fbc.h @@ -24,7 +24,7 @@ bool intel_fbc_pre_update(struct intel_atomic_state *state, void intel_fbc_post_update(struct intel_atomic_state *state, struct intel_crtc *crtc); void intel_fbc_init(struct drm_i915_private *dev_priv); -void intel_fbc_enable(struct intel_atomic_state *state, +void intel_fbc_update(struct intel_atomic_state *state, struct intel_crtc *crtc); void intel_fbc_disable(struct intel_crtc *crtc); void intel_fbc_global_disable(struct drm_i915_private *dev_priv);