diff mbox series

[RFC,11/28] drm/i915: Make Gen8 platform support optional

Message ID 20210414115028.168504-12-tvrtko.ursulin@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Old platform/gen kconfig options series | expand

Commit Message

Tvrtko Ursulin April 14, 2021, 11:50 a.m. UTC
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/Kconfig.platforms | 19 +++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h        |  8 +++++---
 drivers/gpu/drm/i915/i915_pci.c        |  8 ++++++++
 3 files changed, 32 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/Kconfig.platforms b/drivers/gpu/drm/i915/Kconfig.platforms
index 1fe95996879a..346d440d049c 100644
--- a/drivers/gpu/drm/i915/Kconfig.platforms
+++ b/drivers/gpu/drm/i915/Kconfig.platforms
@@ -167,3 +167,22 @@  config DRM_I915_PLATFORM_INTEL_HASWELL
 	select DRM_I915_GEN7
 	help
 	  Include support for Intel Haswell platforms.
+
+config DRM_I915_GEN8
+	bool
+
+config DRM_I915_PLATFORM_INTEL_BROADWELL
+	bool "Intel Broadwell platform support"
+	default y
+	depends on DRM_I915
+	select DRM_I915_GEN8
+	help
+	  Include support for Intel Broadwell platforms.
+
+config DRM_I915_PLATFORM_INTEL_CHERRYVIEW
+	bool "Intel Cherryview platform support"
+	default y
+	depends on DRM_I915
+	select DRM_I915_GEN8
+	help
+	  Include support for Intel Cherryview platforms.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1b82dadc7b0b..6658015c4a9f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2603,9 +2603,9 @@  intel_info(const struct drm_i915_private *dev_priv)
 #define IS_IVB_GT1(dev_priv)	(IS_IVYBRIDGE(dev_priv) && \
 				 (dev_priv)->info.gt == 1)
 #define IS_VALLEYVIEW(dev_priv)	IS_OPT_PLATFORM(dev_priv, INTEL_VALLEYVIEW)
-#define IS_CHERRYVIEW(dev_priv)	IS_PLATFORM(dev_priv, INTEL_CHERRYVIEW)
+#define IS_CHERRYVIEW(dev_priv)	IS_OPT_PLATFORM(dev_priv, INTEL_CHERRYVIEW)
 #define IS_HASWELL(dev_priv)	IS_OPT_PLATFORM(dev_priv, INTEL_HASWELL)
-#define IS_BROADWELL(dev_priv)	IS_PLATFORM(dev_priv, INTEL_BROADWELL)
+#define IS_BROADWELL(dev_priv)	IS_OPT_PLATFORM(dev_priv, INTEL_BROADWELL)
 #define IS_SKYLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_SKYLAKE)
 #define IS_BROXTON(dev_priv)	IS_PLATFORM(dev_priv, INTEL_BROXTON)
 #define IS_KABYLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_KABYLAKE)
@@ -2736,7 +2736,9 @@  intel_info(const struct drm_i915_private *dev_priv)
 #define IS_GEN7(dev_priv) \
 	(IS_ENABLED(CONFIG_DRM_I915_GEN7) && \
 	 ((dev_priv)->info.gen_mask & BIT(6)))
-#define IS_GEN8(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(7)))
+#define IS_GEN8(dev_priv) \
+	(IS_ENABLED(CONFIG_DRM_I915_GEN8) && \
+	 ((dev_priv)->info.gen_mask & BIT(7)))
 #define IS_GEN9(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(8)))
 #define IS_GEN10(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(9)))
 #define IS_GEN11(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(10)))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 205a8fc5e8be..4645f3e2eea4 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -430,6 +430,7 @@  static const struct intel_device_info intel_haswell_gt3_info = {
 	.gen = 8, \
 	.platform = INTEL_BROADWELL
 
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_BROADWELL
 static const struct intel_device_info intel_broadwell_gt1_info = {
 	BDW_PLATFORM,
 	.gt = 1,
@@ -453,7 +454,9 @@  static const struct intel_device_info intel_broadwell_gt3_info = {
 	.gt = 3,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
+#endif
 
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_CHERRYVIEW
 static const struct intel_device_info intel_cherryview_info = {
 	.gen = 8, .num_pipes = 3,
 	.has_hotplug = 1,
@@ -477,6 +480,7 @@  static const struct intel_device_info intel_cherryview_info = {
 	CURSOR_OFFSETS,
 	CHV_COLORS,
 };
+#endif
 
 #define GEN9_DEFAULT_PAGE_SIZES \
 	.page_sizes = I915_GTT_PAGE_SIZE_4K | \
@@ -708,11 +712,15 @@  static const struct pci_device_id pciidlist[] = {
 #ifdef CONFIG_DRM_I915_PLATFORM_INTEL_VALLEYVIEW
 	INTEL_VLV_IDS(&intel_valleyview_info),
 #endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_BROADWELL
 	INTEL_BDW_GT1_IDS(&intel_broadwell_gt1_info),
 	INTEL_BDW_GT2_IDS(&intel_broadwell_gt2_info),
 	INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info),
 	INTEL_BDW_RSVD_IDS(&intel_broadwell_rsvd_info),
+#endif
+#ifdef CONFIG_DRM_I915_PLATFORM_INTEL_CHERRYVIEW
 	INTEL_CHV_IDS(&intel_cherryview_info),
+#endif
 	INTEL_SKL_GT1_IDS(&intel_skylake_gt1_info),
 	INTEL_SKL_GT2_IDS(&intel_skylake_gt2_info),
 	INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info),