diff mbox series

[RFC,27/28] drm/i915: Use IS_GEN in intel_lrc.c

Message ID 20210414115028.168504-28-tvrtko.ursulin@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Old platform/gen kconfig options series | expand

Commit Message

Tvrtko Ursulin April 14, 2021, 11:50 a.m. UTC
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 29 +++++++++++------------------
 1 file changed, 11 insertions(+), 18 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 55df19ec879e..63872514213c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1413,20 +1413,16 @@  static int intel_init_workaround_bb(struct intel_engine_cs *engine)
 	if (GEM_WARN_ON(engine->id != RCS))
 		return -EINVAL;
 
-	switch (INTEL_GEN(engine->i915)) {
-	case 10:
+	if (IS_GEN10(engine->i915)) {
 		wa_bb_fn[0] = gen10_init_indirectctx_bb;
 		wa_bb_fn[1] = NULL;
-		break;
-	case 9:
+	} else if (IS_GEN9(engine->i915)) {
 		wa_bb_fn[0] = gen9_init_indirectctx_bb;
 		wa_bb_fn[1] = NULL;
-		break;
-	case 8:
+	} else if (IS_GEN8(engine->i915)) {
 		wa_bb_fn[0] = gen8_init_indirectctx_bb;
 		wa_bb_fn[1] = NULL;
-		break;
-	default:
+	} else {
 		MISSING_CASE(INTEL_GEN(engine->i915));
 		return 0;
 	}
@@ -2149,22 +2145,19 @@  static u32 intel_lr_indirect_ctx_offset(struct intel_engine_cs *engine)
 {
 	u32 indirect_ctx_offset;
 
-	switch (INTEL_GEN(engine->i915)) {
-	default:
-		MISSING_CASE(INTEL_GEN(engine->i915));
-		/* fall through */
-	case 10:
+	if (IS_GEN10(engine->i915)) {
 		indirect_ctx_offset =
 			GEN10_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
-		break;
-	case 9:
+	} else if (IS_GEN9(engine->i915)) {
 		indirect_ctx_offset =
 			GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
-		break;
-	case 8:
+	} else if (IS_GEN8(engine->i915)) {
 		indirect_ctx_offset =
 			GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
-		break;
+	} else {
+		MISSING_CASE(INTEL_GEN(engine->i915));
+		indirect_ctx_offset =
+			GEN10_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
 	}
 
 	return indirect_ctx_offset;