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[13/14] drm/i915: Write watermarks for disabled pipes on gmch platforms

Message ID 20210514125751.17075-14-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups | expand

Commit Message

Ville Syrjälä May 14, 2021, 12:57 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We've excluded gmch platforms from writing the final watermarks
for any disabled pipe. IIRC the reason was perhaps some lingering
issue with the watermark merging across the pipes. But I can't
really see any reason for this anymore, so let's unify this behaviour.
The main benefit being more consistency in register dumps when
we don't have stale watermarks hanging around in the registers.
Funcitonally there should be no difference as the hardware just
ignore all of it when the pipe is disabled.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
 drivers/gpu/drm/i915/display/intel_display.c | 2 --
 1 file changed, 2 deletions(-)
diff mbox series


diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e696096dbde7..dd8dd8e68c55 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10198,9 +10198,7 @@  static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
-	/* FIXME unify this for all platforms */
 	if (!new_crtc_state->hw.active &&
-	    !HAS_GMCH(dev_priv) &&
 		dev_priv->display.initial_watermarks(state, crtc);