From patchwork Tue Jun 8 07:35:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 12305557 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A44FC47082 for ; Tue, 8 Jun 2021 07:36:51 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 16E0F610C7 for ; Tue, 8 Jun 2021 07:36:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 16E0F610C7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 993F86EAF0; Tue, 8 Jun 2021 07:36:50 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 09FE46EAF0 for ; Tue, 8 Jun 2021 07:36:48 +0000 (UTC) IronPort-SDR: 7H+HoQI1aUUL4YxeljyojnWG8IBauInp3GaiZlEguvsrQSAzDt2IWHpvuodTC6LMeJBkYtEg8r O9sWyBsJEiWQ== X-IronPort-AV: E=McAfee;i="6200,9189,10008"; a="290420211" X-IronPort-AV: E=Sophos;i="5.83,257,1616482800"; d="scan'208";a="290420211" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2021 00:36:48 -0700 IronPort-SDR: /Yew03d0N6tN2xtLnVu0cQ2BqeBshZL5jkVNxDo2U2j5TK63sV7ZU134WHiylDNVMwQpzvt4jz K46jWL3hE5mw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,257,1616482800"; d="scan'208";a="449423127" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by fmsmga008.fm.intel.com with SMTP; 08 Jun 2021 00:36:46 -0700 Received: by stinkbox (sSMTP sendmail emulation); Tue, 08 Jun 2021 10:36:46 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 8 Jun 2021 10:35:59 +0300 Message-Id: <20210608073603.2408-14-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210608073603.2408-1-ville.syrjala@linux.intel.com> References: <20210608073603.2408-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 13/17] drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 table X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The icl combo phy DP HBR2 is identical to the eDP HBR3 table. Get rid of one redundant copy. Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- .../drm/i915/display/intel_ddi_buf_trans.c | 39 +++++-------------- 1 file changed, 10 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c index 52bc6cbe36cf..6e2b6c851fb4 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c @@ -598,7 +598,7 @@ static const struct intel_ddi_buf_trans cnl_ddi_translations_edp_1_05V = { }; /* icl_combo_phy_ddi_translations */ -static const union intel_ddi_buf_trans_entry _icl_combo_phy_ddi_translations_dp_hbr2[] = { +static const union intel_ddi_buf_trans_entry _icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3[] = { /* NT mV Trans mV db */ { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ @@ -612,9 +612,9 @@ static const union intel_ddi_buf_trans_entry _icl_combo_phy_ddi_translations_dp_ { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ }; -static const struct intel_ddi_buf_trans icl_combo_phy_ddi_translations_dp_hbr2 = { - .entries = _icl_combo_phy_ddi_translations_dp_hbr2, - .num_entries = ARRAY_SIZE(_icl_combo_phy_ddi_translations_dp_hbr2), +static const struct intel_ddi_buf_trans icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3 = { + .entries = _icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, + .num_entries = ARRAY_SIZE(_icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3), }; static const union intel_ddi_buf_trans_entry _icl_combo_phy_ddi_translations_edp_hbr2[] = { @@ -636,25 +636,6 @@ static const struct intel_ddi_buf_trans icl_combo_phy_ddi_translations_edp_hbr2 .num_entries = ARRAY_SIZE(_icl_combo_phy_ddi_translations_edp_hbr2), }; -static const union intel_ddi_buf_trans_entry _icl_combo_phy_ddi_translations_edp_hbr3[] = { - /* NT mV Trans mV db */ - { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ - { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ - { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ - { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ - { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ - { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ - { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ - { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ - { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ - { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ -}; - -static const struct intel_ddi_buf_trans icl_combo_phy_ddi_translations_edp_hbr3 = { - .entries = _icl_combo_phy_ddi_translations_edp_hbr3, - .num_entries = ARRAY_SIZE(_icl_combo_phy_ddi_translations_edp_hbr3), -}; - static const union intel_ddi_buf_trans_entry _icl_combo_phy_ddi_translations_hdmi[] = { /* NT mV Trans mV db */ { .cnl = { 0xA, 0x60, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ @@ -1308,7 +1289,7 @@ icl_get_combo_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) { - return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2, + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, n_entries); } @@ -1320,7 +1301,7 @@ icl_get_combo_buf_trans_edp(struct intel_encoder *encoder, struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); if (crtc_state->port_clock > 540000) { - return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr3, + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, n_entries); } else if (dev_priv->vbt.edp.low_vswing) { return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2, @@ -1437,7 +1418,7 @@ jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) { - return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2, + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, n_entries); } @@ -1513,7 +1494,7 @@ tgl_get_combo_buf_trans_edp(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(encoder); if (crtc_state->port_clock > 540000) { - return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr3, + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, n_entries); } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) { return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl, @@ -1561,7 +1542,7 @@ dg1_get_combo_buf_trans_edp(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(encoder); if (crtc_state->port_clock > 540000) - return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr3, + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, n_entries); else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl, @@ -1606,7 +1587,7 @@ rkl_get_combo_buf_trans_edp(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(encoder); if (crtc_state->port_clock > 540000) { - return intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr3, + return intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3, n_entries); } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) { return intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl,