| Message ID | 20210727152202.9527-6-matthew.brost@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Updates for GuC & parallel submission | expand |
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index 332c07e3d..0c023a52d 100644 --- a/include/drm-uapi/i915_drm.h +++ b/include/drm-uapi/i915_drm.h @@ -572,6 +572,15 @@ typedef struct drm_i915_irq_wait { #define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2) #define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3) #define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4) +/* + * Indicates the 2k user priority levels are statically mapped into 3 buckets as + * follows: + * + * -1k to -1 Low priority + * 0 Normal priority + * 1 to 1k Highest priority + */ +#define I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP (1ul << 5) #define I915_PARAM_HUC_STATUS 42
Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- include/drm-uapi/i915_drm.h | 9 +++++++++ 1 file changed, 9 insertions(+)