Message ID | 20210728215946.1573015-26-lucas.demarchi@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Remove CNL - for drm-intel-next | expand |
On Wed, Jul 28, 2021 at 02:59:46PM -0700, Lucas De Marchi wrote: >With all the users removed, finish removing the CNL platform definitions. >We will leave the PCI IDs around as those are exposed to userspace. >Even if mesa doesn't support CNL anymore, let's avoid build breakages >due to changing the headers. > >Also, due to drm/i915/gt still using IS_CANNONLAKE() let's just redefine >it instead of removing. +Rodrigo Rodrigo, when I was going to merge this patch I noticed it was not really possible. IS_CANNONLAKE() is used in drm/i915/gt/ so it can't be removed if part of the patches are merged in one branch and the other part in another. I also checked if it would be possible to do this by using a topic branch, but that gives conflicts when trying to use the merge base. So, I re-submitted the series split in 2: one for drm-intel-next and another for drm-intel-gt-next. Here instead of removing IS_CANNONLAKE() I only redefine it to 0. I'm keeping your previous r-b below, but please let me know if all above is fine and your r-b still stands. thanks Lucas De Marchi > >Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> >Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> >--- > drivers/gpu/drm/i915/i915_drv.h | 8 ++------ > drivers/gpu/drm/i915/i915_pci.c | 23 +++++------------------ > drivers/gpu/drm/i915/i915_perf.c | 1 - > drivers/gpu/drm/i915/intel_device_info.c | 2 -- > drivers/gpu/drm/i915/intel_device_info.h | 2 -- > 5 files changed, 7 insertions(+), 29 deletions(-) > >diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h >index 5d5cf5ad0513..6ac90ccbee0b 100644 >--- a/drivers/gpu/drm/i915/i915_drv.h >+++ b/drivers/gpu/drm/i915/i915_drv.h >@@ -1380,7 +1380,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > #define IS_GEMINILAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_GEMINILAKE) > #define IS_COFFEELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_COFFEELAKE) > #define IS_COMETLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_COMETLAKE) >-#define IS_CANNONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_CANNONLAKE) >+#define IS_CANNONLAKE(dev_priv) 0 > #define IS_ICELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ICELAKE) > #define IS_JSL_EHL(dev_priv) (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) || \ > IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE)) >@@ -1446,8 +1446,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > #define IS_CML_GT2(dev_priv) (IS_COMETLAKE(dev_priv) && \ > INTEL_INFO(dev_priv)->gt == 2) > >-#define IS_CNL_WITH_PORT_F(dev_priv) \ >- IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, INTEL_SUBPLATFORM_PORTF) > #define IS_ICL_WITH_PORT_F(dev_priv) \ > IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF) > >@@ -1592,9 +1590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > > /* WaRsDisableCoarsePowerGating:skl,cnl */ > #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \ >- (IS_CANNONLAKE(dev_priv) || \ >- IS_SKL_GT3(dev_priv) || \ >- IS_SKL_GT4(dev_priv)) >+ (IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv)) > > #define HAS_GMBUS_IRQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 4) > #define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= 11 || \ >diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c >index ec80cd1cd00c..cb4a46174513 100644 >--- a/drivers/gpu/drm/i915/i915_pci.c >+++ b/drivers/gpu/drm/i915/i915_pci.c >@@ -787,27 +787,13 @@ static const struct intel_device_info cml_gt2_info = { > .gt = 2, > }; > >-#define GEN10_FEATURES \ >- GEN9_FEATURES, \ >- GEN(10), \ >- .dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */ \ >- .display.has_dsc = 1, \ >- .has_coherent_ggtt = false, \ >- GLK_COLORS >- >-static const struct intel_device_info cnl_info = { >- GEN10_FEATURES, >- PLATFORM(INTEL_CANNONLAKE), >- .gt = 2, >-}; >- > #define GEN11_DEFAULT_PAGE_SIZES \ > .page_sizes = I915_GTT_PAGE_SIZE_4K | \ > I915_GTT_PAGE_SIZE_64K | \ > I915_GTT_PAGE_SIZE_2M > > #define GEN11_FEATURES \ >- GEN10_FEATURES, \ >+ GEN9_FEATURES, \ > GEN11_DEFAULT_PAGE_SIZES, \ > .abox_mask = BIT(0), \ > .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \ >@@ -830,10 +816,12 @@ static const struct intel_device_info cnl_info = { > [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \ > }, \ > GEN(11), \ >+ .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 }, \ > .dbuf.size = 2048, \ > .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \ >- .has_logical_ring_elsq = 1, \ >- .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 } >+ .display.has_dsc = 1, \ >+ .has_coherent_ggtt = false, \ >+ .has_logical_ring_elsq = 1 > > static const struct intel_device_info icl_info = { > GEN11_FEATURES, >@@ -1123,7 +1111,6 @@ static const struct pci_device_id pciidlist[] = { > INTEL_CML_GT2_IDS(&cml_gt2_info), > INTEL_CML_U_GT1_IDS(&cml_gt1_info), > INTEL_CML_U_GT2_IDS(&cml_gt2_info), >- INTEL_CNL_IDS(&cnl_info), > INTEL_ICL_11_IDS(&icl_info), > INTEL_EHL_IDS(&ehl_info), > INTEL_JSL_IDS(&jsl_info), >diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c >index 05e941cd1065..efef89e53440 100644 >--- a/drivers/gpu/drm/i915/i915_perf.c >+++ b/drivers/gpu/drm/i915/i915_perf.c >@@ -4309,7 +4309,6 @@ static void oa_init_supported_formats(struct i915_perf *perf) > case INTEL_GEMINILAKE: > case INTEL_COFFEELAKE: > case INTEL_COMETLAKE: >- case INTEL_CANNONLAKE: > case INTEL_ICELAKE: > case INTEL_ELKHARTLAKE: > case INTEL_JASPERLAKE: >diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c >index 1ccaeb03ad6d..305facedd284 100644 >--- a/drivers/gpu/drm/i915/intel_device_info.c >+++ b/drivers/gpu/drm/i915/intel_device_info.c >@@ -59,7 +59,6 @@ static const char * const platform_names[] = { > PLATFORM_NAME(GEMINILAKE), > PLATFORM_NAME(COFFEELAKE), > PLATFORM_NAME(COMETLAKE), >- PLATFORM_NAME(CANNONLAKE), > PLATFORM_NAME(ICELAKE), > PLATFORM_NAME(ELKHARTLAKE), > PLATFORM_NAME(JASPERLAKE), >@@ -175,7 +174,6 @@ static const u16 subplatform_ulx_ids[] = { > }; > > static const u16 subplatform_portf_ids[] = { >- INTEL_CNL_PORT_F_IDS(0), > INTEL_ICL_PORT_F_IDS(0), > }; > >diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h >index 316edad22eb0..ef1eecd259e0 100644 >--- a/drivers/gpu/drm/i915/intel_device_info.h >+++ b/drivers/gpu/drm/i915/intel_device_info.h >@@ -76,8 +76,6 @@ enum intel_platform { > INTEL_GEMINILAKE, > INTEL_COFFEELAKE, > INTEL_COMETLAKE, >- /* gen10 */ >- INTEL_CANNONLAKE, > /* gen11 */ > INTEL_ICELAKE, > INTEL_ELKHARTLAKE, >-- >2.31.1 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, 2021-07-28 at 17:32 -0700, Lucas De Marchi wrote: > On Wed, Jul 28, 2021 at 02:59:46PM -0700, Lucas De Marchi wrote: > > With all the users removed, finish removing the CNL platform > > definitions. > > We will leave the PCI IDs around as those are exposed to userspace. > > Even if mesa doesn't support CNL anymore, let's avoid build > > breakages > > due to changing the headers. > > > > Also, due to drm/i915/gt still using IS_CANNONLAKE() let's just > > redefine > > it instead of removing. > > +Rodrigo > > Rodrigo, when I was going to merge this patch I noticed it was not > really possible. IS_CANNONLAKE() is used in drm/i915/gt/ so it can't > be > removed if part of the patches are merged in one branch and the other > part in another. > > I also checked if it would be possible to do this by using a topic > branch, but that > gives conflicts when trying to use the merge base. So, I re-submitted > the series split in 2: one for drm-intel-next and another for > drm-intel-gt-next. Here instead of removing IS_CANNONLAKE() I only > redefine it to 0. I'm keeping your previous r-b below, but please > let > me know if all above is fine and your r-b still stands. oh, I had missed this but I saw that and acked already. All rv-b are still valid! > > thanks > Lucas De Marchi > > > > > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > --- > > drivers/gpu/drm/i915/i915_drv.h | 8 ++------ > > drivers/gpu/drm/i915/i915_pci.c | 23 +++++---------------- > > -- > > drivers/gpu/drm/i915/i915_perf.c | 1 - > > drivers/gpu/drm/i915/intel_device_info.c | 2 -- > > drivers/gpu/drm/i915/intel_device_info.h | 2 -- > > 5 files changed, 7 insertions(+), 29 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > b/drivers/gpu/drm/i915/i915_drv.h > > index 5d5cf5ad0513..6ac90ccbee0b 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -1380,7 +1380,7 @@ IS_SUBPLATFORM(const struct drm_i915_private > > *i915, > > #define IS_GEMINILAKE(dev_priv) IS_PLATFORM(dev_priv, > > INTEL_GEMINILAKE) > > #define IS_COFFEELAKE(dev_priv) IS_PLATFORM(dev_priv, > > INTEL_COFFEELAKE) > > #define IS_COMETLAKE(dev_priv) IS_PLATFORM(dev_priv, > > INTEL_COMETLAKE) > > -#define IS_CANNONLAKE(dev_priv) IS_PLATFORM(dev_priv, > > INTEL_CANNONLAKE) > > +#define IS_CANNONLAKE(dev_priv) 0 > > #define IS_ICELAKE(dev_priv) IS_PLATFORM(dev_priv, > > INTEL_ICELAKE) > > #define IS_JSL_EHL(dev_priv) (IS_PLATFORM(dev_priv, > > INTEL_JASPERLAKE) || \ > > IS_PLATFORM(dev_priv, > > INTEL_ELKHARTLAKE)) > > @@ -1446,8 +1446,6 @@ IS_SUBPLATFORM(const struct drm_i915_private > > *i915, > > #define IS_CML_GT2(dev_priv) (IS_COMETLAKE(dev_priv) && \ > > INTEL_INFO(dev_priv)->gt == 2) > > > > -#define IS_CNL_WITH_PORT_F(dev_priv) \ > > - IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, > > INTEL_SUBPLATFORM_PORTF) > > #define IS_ICL_WITH_PORT_F(dev_priv) \ > > IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, > > INTEL_SUBPLATFORM_PORTF) > > > > @@ -1592,9 +1590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private > > *i915, > > > > /* WaRsDisableCoarsePowerGating:skl,cnl */ > > #define > > NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \ > > - (IS_CANNONLAKE(dev_priv) > > || \ > > - IS_SKL_GT3(dev_priv) > > || \ > > - IS_SKL_GT4(dev_priv)) > > + (IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv)) > > > > #define HAS_GMBUS_IRQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 4) > > #define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= > > 11 || \ > > diff --git a/drivers/gpu/drm/i915/i915_pci.c > > b/drivers/gpu/drm/i915/i915_pci.c > > index ec80cd1cd00c..cb4a46174513 100644 > > --- a/drivers/gpu/drm/i915/i915_pci.c > > +++ b/drivers/gpu/drm/i915/i915_pci.c > > @@ -787,27 +787,13 @@ static const struct intel_device_info > > cml_gt2_info = { > > .gt = 2, > > }; > > > > -#define GEN10_FEATURES \ > > - GEN9_FEATURES, \ > > - GEN(10), \ > > - .dbuf.size = 1024 - 4, /* 4 blocks for bypass path > > allocation */ \ > > - .display.has_dsc = 1, \ > > - .has_coherent_ggtt = false, \ > > - GLK_COLORS > > - > > -static const struct intel_device_info cnl_info = { > > - GEN10_FEATURES, > > - PLATFORM(INTEL_CANNONLAKE), > > - .gt = 2, > > -}; > > - > > #define GEN11_DEFAULT_PAGE_SIZES \ > > .page_sizes = I915_GTT_PAGE_SIZE_4K | \ > > I915_GTT_PAGE_SIZE_64K | \ > > I915_GTT_PAGE_SIZE_2M > > > > #define GEN11_FEATURES \ > > - GEN10_FEATURES, \ > > + GEN9_FEATURES, \ > > GEN11_DEFAULT_PAGE_SIZES, \ > > .abox_mask = BIT(0), \ > > .cpu_transcoder_mask = BIT(TRANSCODER_A) | > > BIT(TRANSCODER_B) | \ > > @@ -830,10 +816,12 @@ static const struct intel_device_info > > cnl_info = { > > [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \ > > }, \ > > GEN(11), \ > > + .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 > > }, \ > > .dbuf.size = 2048, \ > > .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \ > > - .has_logical_ring_elsq = 1, \ > > - .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 > > } > > + .display.has_dsc = 1, \ > > + .has_coherent_ggtt = false, \ > > + .has_logical_ring_elsq = 1 > > > > static const struct intel_device_info icl_info = { > > GEN11_FEATURES, > > @@ -1123,7 +1111,6 @@ static const struct pci_device_id pciidlist[] > > = { > > INTEL_CML_GT2_IDS(&cml_gt2_info), > > INTEL_CML_U_GT1_IDS(&cml_gt1_info), > > INTEL_CML_U_GT2_IDS(&cml_gt2_info), > > - INTEL_CNL_IDS(&cnl_info), > > INTEL_ICL_11_IDS(&icl_info), > > INTEL_EHL_IDS(&ehl_info), > > INTEL_JSL_IDS(&jsl_info), > > diff --git a/drivers/gpu/drm/i915/i915_perf.c > > b/drivers/gpu/drm/i915/i915_perf.c > > index 05e941cd1065..efef89e53440 100644 > > --- a/drivers/gpu/drm/i915/i915_perf.c > > +++ b/drivers/gpu/drm/i915/i915_perf.c > > @@ -4309,7 +4309,6 @@ static void oa_init_supported_formats(struct > > i915_perf *perf) > > case INTEL_GEMINILAKE: > > case INTEL_COFFEELAKE: > > case INTEL_COMETLAKE: > > - case INTEL_CANNONLAKE: > > case INTEL_ICELAKE: > > case INTEL_ELKHARTLAKE: > > case INTEL_JASPERLAKE: > > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > > b/drivers/gpu/drm/i915/intel_device_info.c > > index 1ccaeb03ad6d..305facedd284 100644 > > --- a/drivers/gpu/drm/i915/intel_device_info.c > > +++ b/drivers/gpu/drm/i915/intel_device_info.c > > @@ -59,7 +59,6 @@ static const char * const platform_names[] = { > > PLATFORM_NAME(GEMINILAKE), > > PLATFORM_NAME(COFFEELAKE), > > PLATFORM_NAME(COMETLAKE), > > - PLATFORM_NAME(CANNONLAKE), > > PLATFORM_NAME(ICELAKE), > > PLATFORM_NAME(ELKHARTLAKE), > > PLATFORM_NAME(JASPERLAKE), > > @@ -175,7 +174,6 @@ static const u16 subplatform_ulx_ids[] = { > > }; > > > > static const u16 subplatform_portf_ids[] = { > > - INTEL_CNL_PORT_F_IDS(0), > > INTEL_ICL_PORT_F_IDS(0), > > }; > > > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h > > b/drivers/gpu/drm/i915/intel_device_info.h > > index 316edad22eb0..ef1eecd259e0 100644 > > --- a/drivers/gpu/drm/i915/intel_device_info.h > > +++ b/drivers/gpu/drm/i915/intel_device_info.h > > @@ -76,8 +76,6 @@ enum intel_platform { > > INTEL_GEMINILAKE, > > INTEL_COFFEELAKE, > > INTEL_COMETLAKE, > > - /* gen10 */ > > - INTEL_CANNONLAKE, > > /* gen11 */ > > INTEL_ICELAKE, > > INTEL_ELKHARTLAKE, > > -- > > 2.31.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 5d5cf5ad0513..6ac90ccbee0b 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1380,7 +1380,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_GEMINILAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_GEMINILAKE) #define IS_COFFEELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_COFFEELAKE) #define IS_COMETLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_COMETLAKE) -#define IS_CANNONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_CANNONLAKE) +#define IS_CANNONLAKE(dev_priv) 0 #define IS_ICELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ICELAKE) #define IS_JSL_EHL(dev_priv) (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) || \ IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE)) @@ -1446,8 +1446,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_CML_GT2(dev_priv) (IS_COMETLAKE(dev_priv) && \ INTEL_INFO(dev_priv)->gt == 2) -#define IS_CNL_WITH_PORT_F(dev_priv) \ - IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, INTEL_SUBPLATFORM_PORTF) #define IS_ICL_WITH_PORT_F(dev_priv) \ IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF) @@ -1592,9 +1590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, /* WaRsDisableCoarsePowerGating:skl,cnl */ #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \ - (IS_CANNONLAKE(dev_priv) || \ - IS_SKL_GT3(dev_priv) || \ - IS_SKL_GT4(dev_priv)) + (IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv)) #define HAS_GMBUS_IRQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 4) #define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= 11 || \ diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index ec80cd1cd00c..cb4a46174513 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -787,27 +787,13 @@ static const struct intel_device_info cml_gt2_info = { .gt = 2, }; -#define GEN10_FEATURES \ - GEN9_FEATURES, \ - GEN(10), \ - .dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */ \ - .display.has_dsc = 1, \ - .has_coherent_ggtt = false, \ - GLK_COLORS - -static const struct intel_device_info cnl_info = { - GEN10_FEATURES, - PLATFORM(INTEL_CANNONLAKE), - .gt = 2, -}; - #define GEN11_DEFAULT_PAGE_SIZES \ .page_sizes = I915_GTT_PAGE_SIZE_4K | \ I915_GTT_PAGE_SIZE_64K | \ I915_GTT_PAGE_SIZE_2M #define GEN11_FEATURES \ - GEN10_FEATURES, \ + GEN9_FEATURES, \ GEN11_DEFAULT_PAGE_SIZES, \ .abox_mask = BIT(0), \ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \ @@ -830,10 +816,12 @@ static const struct intel_device_info cnl_info = { [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \ }, \ GEN(11), \ + .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 }, \ .dbuf.size = 2048, \ .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \ - .has_logical_ring_elsq = 1, \ - .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 } + .display.has_dsc = 1, \ + .has_coherent_ggtt = false, \ + .has_logical_ring_elsq = 1 static const struct intel_device_info icl_info = { GEN11_FEATURES, @@ -1123,7 +1111,6 @@ static const struct pci_device_id pciidlist[] = { INTEL_CML_GT2_IDS(&cml_gt2_info), INTEL_CML_U_GT1_IDS(&cml_gt1_info), INTEL_CML_U_GT2_IDS(&cml_gt2_info), - INTEL_CNL_IDS(&cnl_info), INTEL_ICL_11_IDS(&icl_info), INTEL_EHL_IDS(&ehl_info), INTEL_JSL_IDS(&jsl_info), diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 05e941cd1065..efef89e53440 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -4309,7 +4309,6 @@ static void oa_init_supported_formats(struct i915_perf *perf) case INTEL_GEMINILAKE: case INTEL_COFFEELAKE: case INTEL_COMETLAKE: - case INTEL_CANNONLAKE: case INTEL_ICELAKE: case INTEL_ELKHARTLAKE: case INTEL_JASPERLAKE: diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 1ccaeb03ad6d..305facedd284 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -59,7 +59,6 @@ static const char * const platform_names[] = { PLATFORM_NAME(GEMINILAKE), PLATFORM_NAME(COFFEELAKE), PLATFORM_NAME(COMETLAKE), - PLATFORM_NAME(CANNONLAKE), PLATFORM_NAME(ICELAKE), PLATFORM_NAME(ELKHARTLAKE), PLATFORM_NAME(JASPERLAKE), @@ -175,7 +174,6 @@ static const u16 subplatform_ulx_ids[] = { }; static const u16 subplatform_portf_ids[] = { - INTEL_CNL_PORT_F_IDS(0), INTEL_ICL_PORT_F_IDS(0), }; diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 316edad22eb0..ef1eecd259e0 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -76,8 +76,6 @@ enum intel_platform { INTEL_GEMINILAKE, INTEL_COFFEELAKE, INTEL_COMETLAKE, - /* gen10 */ - INTEL_CANNONLAKE, /* gen11 */ INTEL_ICELAKE, INTEL_ELKHARTLAKE,