| Message ID | 20210729054118.2458523-3-matthew.d.roper@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Forcewake and shadowed register updates | expand |
Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com> -caz On Wed, 2021-07-28 at 22:41 -0700, Matt Roper wrote: > The forcewake read logic is identical between gen11 and gen12, only > the > forcewake table data (which is tracked separately) differs; there's > no > need to generate a separate set of gen12 read functions when the > gen11 > functions will work just as well. > > We'll keep the separate write functions for now since the generated > code > directly references different shadow tables between the two > platforms. > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/intel_uncore.c | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c > b/drivers/gpu/drm/i915/intel_uncore.c > index bca548c81572..ea910f7ee635 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -945,9 +945,6 @@ static const struct intel_forcewake_range > __vlv_fw_ranges[] = { > #define __gen11_fwtable_reg_read_fw_domains(uncore, offset) \ > find_fw_domain(uncore, offset) > > -#define __gen12_fwtable_reg_read_fw_domains(uncore, offset) \ > - find_fw_domain(uncore, offset) > - > /* *Must* be sorted by offset! See intel_shadow_table_check(). */ > static const i915_reg_t gen8_shadowed_regs[] = { > RING_TAIL(RENDER_RING_BASE), /* 0x2000 (base) */ > @@ -1617,7 +1614,6 @@ __gen_read(func, 16) \ > __gen_read(func, 32) \ > __gen_read(func, 64) > > -__gen_reg_read_funcs(gen12_fwtable); > __gen_reg_read_funcs(gen11_fwtable); > __gen_reg_read_funcs(fwtable); > __gen_reg_read_funcs(gen6); > @@ -2091,7 +2087,7 @@ static int uncore_forcewake_init(struct > intel_uncore *uncore) > } else if (GRAPHICS_VER(i915) >= 12) { > ASSIGN_FW_DOMAINS_TABLE(uncore, __gen12_fw_ranges); > ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen12_fwtable); > - ASSIGN_READ_MMIO_VFUNCS(uncore, gen12_fwtable); > + ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable); > } else if (GRAPHICS_VER(i915) == 11) { > ASSIGN_FW_DOMAINS_TABLE(uncore, __gen11_fw_ranges); > ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen11_fwtable);
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index bca548c81572..ea910f7ee635 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -945,9 +945,6 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = { #define __gen11_fwtable_reg_read_fw_domains(uncore, offset) \ find_fw_domain(uncore, offset) -#define __gen12_fwtable_reg_read_fw_domains(uncore, offset) \ - find_fw_domain(uncore, offset) - /* *Must* be sorted by offset! See intel_shadow_table_check(). */ static const i915_reg_t gen8_shadowed_regs[] = { RING_TAIL(RENDER_RING_BASE), /* 0x2000 (base) */ @@ -1617,7 +1614,6 @@ __gen_read(func, 16) \ __gen_read(func, 32) \ __gen_read(func, 64) -__gen_reg_read_funcs(gen12_fwtable); __gen_reg_read_funcs(gen11_fwtable); __gen_reg_read_funcs(fwtable); __gen_reg_read_funcs(gen6); @@ -2091,7 +2087,7 @@ static int uncore_forcewake_init(struct intel_uncore *uncore) } else if (GRAPHICS_VER(i915) >= 12) { ASSIGN_FW_DOMAINS_TABLE(uncore, __gen12_fw_ranges); ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen12_fwtable); - ASSIGN_READ_MMIO_VFUNCS(uncore, gen12_fwtable); + ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable); } else if (GRAPHICS_VER(i915) == 11) { ASSIGN_FW_DOMAINS_TABLE(uncore, __gen11_fw_ranges); ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen11_fwtable);
The forcewake read logic is identical between gen11 and gen12, only the forcewake table data (which is tracked separately) differs; there's no need to generate a separate set of gen12 read functions when the gen11 functions will work just as well. We'll keep the separate write functions for now since the generated code directly references different shadow tables between the two platforms. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/intel_uncore.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-)