Message ID | 20210816135139.10060-18-matthew.brost@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Clean up GuC CI failures, simplify locking, and kernel DOC | expand |
On Mon, Aug 16, 2021 at 06:51:34AM -0700, Matthew Brost wrote: > Move guc_blocked fence to struct guc_state as the lock which protects > the fence lives there. > > s/ce->guc_blocked/ce->guc_state.blocked_fence/g > > Signed-off-by: Matthew Brost <matthew.brost@intel.com> General comment, but latest when your combine your count state with a wait queue you're very far into "reinventing a mutex/semaphore, badly" land. I think we really need to look into why we can't just protect this all with a mutex and make sure the awkward transition states are never visible to anyone else. -Daniel > --- > drivers/gpu/drm/i915/gt/intel_context.c | 5 +++-- > drivers/gpu/drm/i915/gt/intel_context_types.h | 5 ++--- > .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 +++++++++--------- > 3 files changed, 14 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c > index 745e84c72c90..0e48939ec85f 100644 > --- a/drivers/gpu/drm/i915/gt/intel_context.c > +++ b/drivers/gpu/drm/i915/gt/intel_context.c > @@ -405,8 +405,9 @@ intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine) > * Initialize fence to be complete as this is expected to be complete > * unless there is a pending schedule disable outstanding. > */ > - i915_sw_fence_init(&ce->guc_blocked, sw_fence_dummy_notify); > - i915_sw_fence_commit(&ce->guc_blocked); > + i915_sw_fence_init(&ce->guc_state.blocked_fence, > + sw_fence_dummy_notify); > + i915_sw_fence_commit(&ce->guc_state.blocked_fence); > > i915_active_init(&ce->active, > __intel_context_active, __intel_context_retire, 0); > diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h > index 3a73f3117873..c06171ee8792 100644 > --- a/drivers/gpu/drm/i915/gt/intel_context_types.h > +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h > @@ -167,6 +167,8 @@ struct intel_context { > * fence related to GuC submission > */ > struct list_head fences; > + /* GuC context blocked fence */ > + struct i915_sw_fence blocked_fence; > } guc_state; > > struct { > @@ -190,9 +192,6 @@ struct intel_context { > */ > struct list_head guc_id_link; > > - /* GuC context blocked fence */ > - struct i915_sw_fence guc_blocked; > - > /* > * GuC priority management > */ > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > index 9ae4633aa7cb..7aa16371908a 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > @@ -1482,24 +1482,24 @@ static void guc_blocked_fence_complete(struct intel_context *ce) > { > lockdep_assert_held(&ce->guc_state.lock); > > - if (!i915_sw_fence_done(&ce->guc_blocked)) > - i915_sw_fence_complete(&ce->guc_blocked); > + if (!i915_sw_fence_done(&ce->guc_state.blocked_fence)) > + i915_sw_fence_complete(&ce->guc_state.blocked_fence); > } > > static void guc_blocked_fence_reinit(struct intel_context *ce) > { > lockdep_assert_held(&ce->guc_state.lock); > - GEM_BUG_ON(!i915_sw_fence_done(&ce->guc_blocked)); > + GEM_BUG_ON(!i915_sw_fence_done(&ce->guc_state.blocked_fence)); > > /* > * This fence is always complete unless a pending schedule disable is > * outstanding. We arm the fence here and complete it when we receive > * the pending schedule disable complete message. > */ > - i915_sw_fence_fini(&ce->guc_blocked); > - i915_sw_fence_reinit(&ce->guc_blocked); > - i915_sw_fence_await(&ce->guc_blocked); > - i915_sw_fence_commit(&ce->guc_blocked); > + i915_sw_fence_fini(&ce->guc_state.blocked_fence); > + i915_sw_fence_reinit(&ce->guc_state.blocked_fence); > + i915_sw_fence_await(&ce->guc_state.blocked_fence); > + i915_sw_fence_commit(&ce->guc_state.blocked_fence); > } > > static u16 prep_context_pending_disable(struct intel_context *ce) > @@ -1539,7 +1539,7 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) > if (enabled) > clr_context_enabled(ce); > spin_unlock_irqrestore(&ce->guc_state.lock, flags); > - return &ce->guc_blocked; > + return &ce->guc_state.blocked_fence; > } > > /* > @@ -1555,7 +1555,7 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) > with_intel_runtime_pm(runtime_pm, wakeref) > __guc_context_sched_disable(guc, ce, guc_id); > > - return &ce->guc_blocked; > + return &ce->guc_state.blocked_fence; > } > > static void guc_context_unblock(struct intel_context *ce) > -- > 2.32.0 >
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c index 745e84c72c90..0e48939ec85f 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.c +++ b/drivers/gpu/drm/i915/gt/intel_context.c @@ -405,8 +405,9 @@ intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine) * Initialize fence to be complete as this is expected to be complete * unless there is a pending schedule disable outstanding. */ - i915_sw_fence_init(&ce->guc_blocked, sw_fence_dummy_notify); - i915_sw_fence_commit(&ce->guc_blocked); + i915_sw_fence_init(&ce->guc_state.blocked_fence, + sw_fence_dummy_notify); + i915_sw_fence_commit(&ce->guc_state.blocked_fence); i915_active_init(&ce->active, __intel_context_active, __intel_context_retire, 0); diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h index 3a73f3117873..c06171ee8792 100644 --- a/drivers/gpu/drm/i915/gt/intel_context_types.h +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h @@ -167,6 +167,8 @@ struct intel_context { * fence related to GuC submission */ struct list_head fences; + /* GuC context blocked fence */ + struct i915_sw_fence blocked_fence; } guc_state; struct { @@ -190,9 +192,6 @@ struct intel_context { */ struct list_head guc_id_link; - /* GuC context blocked fence */ - struct i915_sw_fence guc_blocked; - /* * GuC priority management */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 9ae4633aa7cb..7aa16371908a 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -1482,24 +1482,24 @@ static void guc_blocked_fence_complete(struct intel_context *ce) { lockdep_assert_held(&ce->guc_state.lock); - if (!i915_sw_fence_done(&ce->guc_blocked)) - i915_sw_fence_complete(&ce->guc_blocked); + if (!i915_sw_fence_done(&ce->guc_state.blocked_fence)) + i915_sw_fence_complete(&ce->guc_state.blocked_fence); } static void guc_blocked_fence_reinit(struct intel_context *ce) { lockdep_assert_held(&ce->guc_state.lock); - GEM_BUG_ON(!i915_sw_fence_done(&ce->guc_blocked)); + GEM_BUG_ON(!i915_sw_fence_done(&ce->guc_state.blocked_fence)); /* * This fence is always complete unless a pending schedule disable is * outstanding. We arm the fence here and complete it when we receive * the pending schedule disable complete message. */ - i915_sw_fence_fini(&ce->guc_blocked); - i915_sw_fence_reinit(&ce->guc_blocked); - i915_sw_fence_await(&ce->guc_blocked); - i915_sw_fence_commit(&ce->guc_blocked); + i915_sw_fence_fini(&ce->guc_state.blocked_fence); + i915_sw_fence_reinit(&ce->guc_state.blocked_fence); + i915_sw_fence_await(&ce->guc_state.blocked_fence); + i915_sw_fence_commit(&ce->guc_state.blocked_fence); } static u16 prep_context_pending_disable(struct intel_context *ce) @@ -1539,7 +1539,7 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) if (enabled) clr_context_enabled(ce); spin_unlock_irqrestore(&ce->guc_state.lock, flags); - return &ce->guc_blocked; + return &ce->guc_state.blocked_fence; } /* @@ -1555,7 +1555,7 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) with_intel_runtime_pm(runtime_pm, wakeref) __guc_context_sched_disable(guc, ce, guc_id); - return &ce->guc_blocked; + return &ce->guc_state.blocked_fence; } static void guc_context_unblock(struct intel_context *ce)
Move guc_blocked fence to struct guc_state as the lock which protects the fence lives there. s/ce->guc_blocked/ce->guc_state.blocked_fence/g Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/intel_context.c | 5 +++-- drivers/gpu/drm/i915/gt/intel_context_types.h | 5 ++--- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 +++++++++--------- 3 files changed, 14 insertions(+), 14 deletions(-)