| Message ID | 20210921002313.1132357-4-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/tc: Fix TypeC connect/disconnect sequences | expand |
On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote: > Waiting for the PHY complete flag to clear when releasing the PHY > ownership was add in > > commit ddec362724f9 ("drm/i915: Wait for TypeC PHY complete flag to clear in safe mode") > > This isn't required by the spec, the vague idea was to make the > handshake with the firmware more robust, without actual evidence for > when it would be needed. Checking this again, the flag doesn't clear on > ICL until after the PHY's PLL is disabled and the flag is permanently > set on ADL-P. To avoid the spurious timeout messages in dmesg, just > remove this wait. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > Cc: José Roberto de Souza <jose.souza@intel.com> > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/display/intel_tc.c | 5 ----- > 1 file changed, 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c > index 7dc3696085c71..0d3555437b0b1 100644 > --- a/drivers/gpu/drm/i915/display/intel_tc.c > +++ b/drivers/gpu/drm/i915/display/intel_tc.c > @@ -339,11 +339,6 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port, > intel_uncore_write(uncore, > PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val); > > - if (!take && wait_for(!tc_phy_status_complete(dig_port), 10)) > - drm_dbg_kms(&i915->drm, > - "Port %s: PHY complete clear timed out\n", > - dig_port->tc_port_name); > - > return true; > } >
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 7dc3696085c71..0d3555437b0b1 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -339,11 +339,6 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port, intel_uncore_write(uncore, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val); - if (!take && wait_for(!tc_phy_status_complete(dig_port), 10)) - drm_dbg_kms(&i915->drm, - "Port %s: PHY complete clear timed out\n", - dig_port->tc_port_name); - return true; }
Waiting for the PHY complete flag to clear when releasing the PHY ownership was add in commit ddec362724f9 ("drm/i915: Wait for TypeC PHY complete flag to clear in safe mode") This isn't required by the spec, the vague idea was to make the handshake with the firmware more robust, without actual evidence for when it would be needed. Checking this again, the flag doesn't clear on ICL until after the PHY's PLL is disabled and the flag is permanently set on ADL-P. To avoid the spurious timeout messages in dmesg, just remove this wait. Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/display/intel_tc.c | 5 ----- 1 file changed, 5 deletions(-)