diff mbox series

[1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks

Message ID 20211104215813.738524-1-thomas.hellstrom@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks | expand

Commit Message

Thomas Hellström Nov. 4, 2021, 9:58 p.m. UTC 
Some selftests assume that nothing will attempt to grab these bitlocks
while they are held by the selftests. With GuC, for example, that is
not true because the hanging workloads may cause the GuC code to attempt
to grab them for a global reset, and that may cause it to end up
sleeping on the bit never waking up. Regardless whether that will be
the final solution for GuC, use clear_and_wake_up_bit() pending a more
thorough investigation on how this should be handled moving forward.

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 8 ++++----
 drivers/gpu/drm/i915/selftests/igt_reset.c   | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

Comments

Thomas Hellström Nov. 5, 2021, 6:40 a.m. UTC | #1 
On 11/5/21 00:01, Patchwork wrote:
> Project List - Patchwork *Patch Details*
> *Series:* 	series starting with [1/2] drm/i915/selftests: Use 
> clear_and_wake_up_bit() for the per-engine reset bitlocks
> *URL:* 	https://patchwork.freedesktop.org/series/96593/
> *State:* 	failure
> *Details:* 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21521/index.html
>
>
>   CI Bug Log - changes from CI_DRM_10841 -> Patchwork_21521
>
>
>     Summary
>
> *FAILURE*
>
> Serious unknown changes coming with Patchwork_21521 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_21521, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives 
> in CI.
>
> External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21521/index.html
>
>
>     Participating hosts (38 -> 35)
>
> Additional (2): fi-tgl-1115g4 fi-tgl-u2
> Missing (5): bat-dg1-6 bat-dg1-5 fi-bsw-cyan fi-icl-u2 bat-adlp-4
>
>
>     Possible new issues
>
> Here are the unknown changes that may have been introduced in 
> Patchwork_21521:
>
>
>       IGT changes
>
>
>         Possible regressions
>
>   * igt@i915_selftest@live@migrate:
>       o fi-bsw-nick: PASS
>         <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10841/fi-bsw-nick/igt@i915_selftest@live@migrate.html>
>         -> DMESG-WARN
>         <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21521/fi-bsw-nick/igt@i915_selftest@live@migrate.html>
>
Lakshmi, this failure is unrelated.
Vudum, Lakshminarayana Nov. 5, 2021, 5:18 p.m. UTC | #2 
Filed below issue and re-reported.
https://gitlab.freedesktop.org/drm/intel/-/issues/4445
igt@i915_selftest@live@migrate - dmesg-warn - WARNING: held lock freed!

Lakshmi.

From: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Sent: Thursday, November 4, 2021 11:40 PM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Subject: Re: ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks



On 11/5/21 00:01, Patchwork wrote:
Patch Details
Series:

series starting with [1/2] drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks

URL:

https://patchwork.freedesktop.org/series/96593/

State:

failure

Details:

https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21521/index.html

CI Bug Log - changes from CI_DRM_10841 -> Patchwork_21521
Summary

FAILURE

Serious unknown changes coming with Patchwork_21521 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21521, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21521/index.html

Participating hosts (38 -> 35)

Additional (2): fi-tgl-1115g4 fi-tgl-u2
Missing (5): bat-dg1-6 bat-dg1-5 fi-bsw-cyan fi-icl-u2 bat-adlp-4

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_21521:

IGT changes
Possible regressions

  *   igt@i915_selftest@live@migrate:

     *   fi-bsw-nick: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10841/fi-bsw-nick/igt@i915_selftest@live@migrate.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21521/fi-bsw-nick/igt@i915_selftest@live@migrate.html>

Lakshmi, this failure is unrelated.
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 7e2d99dd012d..8590419be4c6 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -528,7 +528,7 @@  static int igt_reset_nop_engine(void *arg)
 				break;
 			}
 		} while (time_before(jiffies, end_time));
-		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
+		clear_and_wake_up_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
 		st_engine_heartbeat_enable(engine);
 
 		pr_info("%s(%s): %d resets\n", __func__, engine->name, count);
@@ -679,7 +679,7 @@  static int igt_reset_fail_engine(void *arg)
 out:
 		pr_info("%s(%s): %d resets\n", __func__, engine->name, count);
 skip:
-		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
+		clear_and_wake_up_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
 		st_engine_heartbeat_enable(engine);
 		intel_context_put(ce);
 
@@ -824,7 +824,7 @@  static int __igt_reset_engine(struct intel_gt *gt, bool active)
 			if (err)
 				break;
 		} while (time_before(jiffies, end_time));
-		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
+		clear_and_wake_up_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
 		st_engine_heartbeat_enable(engine);
 		pr_info("%s: Completed %lu %s resets\n",
 			engine->name, count, active ? "active" : "idle");
@@ -1165,7 +1165,7 @@  static int __igt_reset_engines(struct intel_gt *gt,
 			if (err)
 				break;
 		} while (time_before(jiffies, end_time));
-		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
+		clear_and_wake_up_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
 		st_engine_heartbeat_enable_no_pm(engine);
 
 		pr_info("i915_reset_engine(%s:%s): %lu resets\n",
diff --git a/drivers/gpu/drm/i915/selftests/igt_reset.c b/drivers/gpu/drm/i915/selftests/igt_reset.c
index 9f8590b868a9..a2838c65f8a5 100644
--- a/drivers/gpu/drm/i915/selftests/igt_reset.c
+++ b/drivers/gpu/drm/i915/selftests/igt_reset.c
@@ -36,7 +36,7 @@  void igt_global_reset_unlock(struct intel_gt *gt)
 	enum intel_engine_id id;
 
 	for_each_engine(engine, gt, id)
-		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
+		clear_and_wake_up_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
 
 	clear_bit(I915_RESET_BACKOFF, &gt->reset.flags);
 	wake_up_all(&gt->reset.queue);