diff mbox series

[v2,3/3] drm/i915/xelpd: Add Pipe Color Lut caps to platform config

Message ID 20211125202750.3263848-4-uma.shankar@intel.com (mailing list archive)
State New, archived
Headers show
Series Enable pipe color support on D13 platform | expand

Commit Message

Shankar, Uma Nov. 25, 2021, 8:27 p.m. UTC
XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for
extended range. It has 511 entries for gamma with additional 2 entries
for extended range.

v2: Updated lut size for 10bit gamma, added lut_tests (Ville)

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Ville Syrjälä Nov. 30, 2021, 10:03 a.m. UTC | #1
On Fri, Nov 26, 2021 at 01:57:50AM +0530, Uma Shankar wrote:
> XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for
> extended range. It has 511 entries for gamma with additional 2 entries
> for extended range.
> 
> v2: Updated lut size for 10bit gamma, added lut_tests (Ville)
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f01cba4ec283..22eae330f075 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -938,7 +938,11 @@ static const struct intel_device_info adl_s_info = {
>  
>  #define XE_LPD_FEATURES \
>  	.abox_mask = GENMASK(1, 0),						\
> -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 0 },		\
> +	.color = { .degamma_lut_size = 128, .gamma_lut_size = 1024,		\
> +		   .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING |		\
> +					DRM_COLOR_LUT_EQUAL_CHANNELS,		\
> +		   .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING,		\

The 10bit mode doesn't interpolate so it can handle non-decreasing
values just fine.

With the gamma_lut_tests part dropped this is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +	},									\
>  	.dbuf.size = 4096,							\
>  	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
>  		BIT(DBUF_S4),							\
> -- 
> 2.25.1
Shankar, Uma Dec. 7, 2021, 6:46 a.m. UTC | #2
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Tuesday, November 30, 2021 3:33 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Modem, Bhanuprakash
> <bhanuprakash.modem@intel.com>
> Subject: Re: [PATCH v2 3/3] drm/i915/xelpd: Add Pipe Color Lut caps to platform
> config
> 
> On Fri, Nov 26, 2021 at 01:57:50AM +0530, Uma Shankar wrote:
> > XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for
> > extended range. It has 511 entries for gamma with additional 2 entries
> > for extended range.
> >
> > v2: Updated lut size for 10bit gamma, added lut_tests (Ville)
> >
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_pci.c | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c
> > b/drivers/gpu/drm/i915/i915_pci.c index f01cba4ec283..22eae330f075
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -938,7 +938,11 @@ static const struct intel_device_info adl_s_info
> > = {
> >
> >  #define XE_LPD_FEATURES \
> >  	.abox_mask = GENMASK(1, 0),						\
> > -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 0 },		\
> > +	.color = { .degamma_lut_size = 128, .gamma_lut_size = 1024,		\
> > +		   .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING |
> 	\
> > +					DRM_COLOR_LUT_EQUAL_CHANNELS,
> 	\
> > +		   .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING,
> 	\
> 
> The 10bit mode doesn't interpolate so it can handle non-decreasing values just fine.
> 
> With the gamma_lut_tests part dropped this is
Will drop this, refloat and merge.

Thanks Ville for the review and all the inputs.

Regards,
Uma Shankar
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> > +	},									\
> >  	.dbuf.size = 4096,							\
> >  	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |
> 	\
> >  		BIT(DBUF_S4),							\
> > --
> > 2.25.1
> 
> --
> Ville Syrjälä
> Intel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f01cba4ec283..22eae330f075 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -938,7 +938,11 @@  static const struct intel_device_info adl_s_info = {
 
 #define XE_LPD_FEATURES \
 	.abox_mask = GENMASK(1, 0),						\
-	.color = { .degamma_lut_size = 0, .gamma_lut_size = 0 },		\
+	.color = { .degamma_lut_size = 128, .gamma_lut_size = 1024,		\
+		   .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING |		\
+					DRM_COLOR_LUT_EQUAL_CHANNELS,		\
+		   .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING,		\
+	},									\
 	.dbuf.size = 4096,							\
 	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
 		BIT(DBUF_S4),							\