From patchwork Tue Nov 30 16:05:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Srinivas X-Patchwork-Id: 12647775 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E6C06C433F5 for ; Tue, 30 Nov 2021 16:14:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 604716E514; Tue, 30 Nov 2021 16:14:46 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 34A5B6E514 for ; Tue, 30 Nov 2021 16:14:45 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10183"; a="322491917" X-IronPort-AV: E=Sophos;i="5.87,276,1631602800"; d="scan'208";a="322491917" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2021 08:14:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,276,1631602800"; d="scan'208";a="654220437" Received: from vsrini4-xps-8920.iind.intel.com (HELO localhost.localdomain) ([10.223.163.28]) by fmsmga001.fm.intel.com with ESMTP; 30 Nov 2021 08:14:40 -0800 From: Vidya Srinivas To: intel-gfx@lists.freedesktop.org Date: Tue, 30 Nov 2021 21:35:34 +0530 Message-Id: <20211130160534.7983-1-vidya.srinivas@intel.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211118062516.22535-1-vidya.srinivas@intel.com> References: <20211118062516.22535-1-vidya.srinivas@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yashashvi Shantam Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" PLANE_CUS_CTL has a restriction of 4096 width even though PLANE_SIZE and scaler size registers supports max 5120. Take care of this restriction in max_width. Without this patch, when 5k content is sent on HDR plane with NV12 content, FIFO underrun is seen and screen blanks out. Signed-off-by: Vidya Srinivas Signed-off-by: Yashashvi Shantam Change-Id: If629c478ba044c8bde633de9f0fc638aa6c44233 --- .../gpu/drm/i915/display/intel_display_types.h | 3 ++- .../gpu/drm/i915/display/skl_universal_plane.c | 17 +++++++++++++---- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index ea1e8a6e10b0..0455ea340329 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1358,7 +1358,8 @@ struct intel_plane { int (*min_width)(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation); - int (*max_width)(const struct drm_framebuffer *fb, + int (*max_width)(struct intel_plane *plane, + const struct drm_framebuffer *fb, int color_plane, unsigned int rotation); int (*max_height)(const struct drm_framebuffer *fb, diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 28890876bdeb..a49829c5a863 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -313,7 +313,8 @@ static int skl_plane_min_cdclk(const struct intel_crtc_state *crtc_state, return DIV_ROUND_UP(pixel_rate * num, den); } -static int skl_plane_max_width(const struct drm_framebuffer *fb, +static int skl_plane_max_width(struct intel_plane *plane, + const struct drm_framebuffer *fb, int color_plane, unsigned int rotation) { @@ -352,7 +353,8 @@ static int skl_plane_max_width(const struct drm_framebuffer *fb, } } -static int glk_plane_max_width(const struct drm_framebuffer *fb, +static int glk_plane_max_width(struct intel_plane *plane, + const struct drm_framebuffer *fb, int color_plane, unsigned int rotation) { @@ -420,10 +422,17 @@ static int icl_plane_min_width(const struct drm_framebuffer *fb, } } -static int icl_plane_max_width(const struct drm_framebuffer *fb, +static int icl_plane_max_width(struct intel_plane *plane, + const struct drm_framebuffer *fb, int color_plane, unsigned int rotation) { + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); + + if (icl_is_hdr_plane(dev_priv, plane->id) && + intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) + return 4096; + return 5120; } @@ -1377,7 +1386,7 @@ static int intel_plane_max_width(struct intel_plane *plane, unsigned int rotation) { if (plane->max_width) - return plane->max_width(fb, color_plane, rotation); + return plane->max_width(plane, fb, color_plane, rotation); else return INT_MAX; }