Message ID | 20211130171220.8622-1-vidya.srinivas@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: Add PLANE_CUS_CTL restriction in max_width | expand |
On Tue, Nov 30, 2021 at 10:42:20PM +0530, Vidya Srinivas wrote: > PLANE_CUS_CTL has a restriction of 4096 width even though > PLANE_SIZE and scaler size registers supports max 5120. > Take care of this restriction in max_width. > > Without this patch, when 5k content is sent on HDR plane > with NV12 content, FIFO underrun is seen and screen blanks > out. > > v2: Addressed review comments from Ville. Added separate > functions for max_width - for HDR and SDR > > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > Signed-off-by: Yashashvi Shantam <shantam.yashashvi@intel.com> > --- > .../gpu/drm/i915/display/skl_universal_plane.c | 17 +++++++++++++++-- > 1 file changed, 15 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c > index 28890876bdeb..d320a3ba1ade 100644 > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c > @@ -420,7 +420,17 @@ static int icl_plane_min_width(const struct drm_framebuffer *fb, > } > } > > -static int icl_plane_max_width(const struct drm_framebuffer *fb, > +static int icl_plane_max_width_hdr(const struct drm_framebuffer *fb, Naming wise I would probably go with icl_hdr_plane_max_width() and icl_sdr_plane_max_width(). Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > + int color_plane, > + unsigned int rotation) > +{ > + if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) > + return 4096; > + else > + return 5120; > +} > + > +static int icl_plane_max_width_sdr(const struct drm_framebuffer *fb, > int color_plane, > unsigned int rotation) > { > @@ -2108,7 +2118,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, > > if (DISPLAY_VER(dev_priv) >= 11) { > plane->min_width = icl_plane_min_width; > - plane->max_width = icl_plane_max_width; > + if (icl_is_hdr_plane(dev_priv, plane_id)) > + plane->max_width = icl_plane_max_width_hdr; > + else > + plane->max_width = icl_plane_max_width_sdr; > plane->max_height = icl_plane_max_height; > plane->min_cdclk = icl_plane_min_cdclk; > } else if (DISPLAY_VER(dev_priv) >= 10) { > -- > 2.33.0
> -----Original Message----- > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > Sent: Tuesday, November 30, 2021 11:40 PM > To: Srinivas, Vidya <vidya.srinivas@intel.com> > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma > <uma.shankar@intel.com>; Yashashvi, Shantam > <shantam.yashashvi@intel.com> > Subject: Re: [PATCH] drm/i915: Add PLANE_CUS_CTL restriction in max_width > > On Tue, Nov 30, 2021 at 10:42:20PM +0530, Vidya Srinivas wrote: > > PLANE_CUS_CTL has a restriction of 4096 width even though PLANE_SIZE > > and scaler size registers supports max 5120. > > Take care of this restriction in max_width. > > > > Without this patch, when 5k content is sent on HDR plane with NV12 > > content, FIFO underrun is seen and screen blanks out. > > > > v2: Addressed review comments from Ville. Added separate functions for > > max_width - for HDR and SDR > > > > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > > Signed-off-by: Yashashvi Shantam <shantam.yashashvi@intel.com> > > --- > > .../gpu/drm/i915/display/skl_universal_plane.c | 17 > > +++++++++++++++-- > > 1 file changed, 15 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c > > b/drivers/gpu/drm/i915/display/skl_universal_plane.c > > index 28890876bdeb..d320a3ba1ade 100644 > > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c > > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c > > @@ -420,7 +420,17 @@ static int icl_plane_min_width(const struct > drm_framebuffer *fb, > > } > > } > > > > -static int icl_plane_max_width(const struct drm_framebuffer *fb, > > +static int icl_plane_max_width_hdr(const struct drm_framebuffer *fb, > > Naming wise I would probably go with icl_hdr_plane_max_width() and > icl_sdr_plane_max_width(). > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Thank you very much Ville, for the patch review and RB. Have fixed the naming. Regards Vidya > > > + int color_plane, > > + unsigned int rotation) > > +{ > > + if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) > > + return 4096; > > + else > > + return 5120; > > +} > > + > > +static int icl_plane_max_width_sdr(const struct drm_framebuffer *fb, > > int color_plane, > > unsigned int rotation) > > { > > @@ -2108,7 +2118,10 @@ skl_universal_plane_create(struct > > drm_i915_private *dev_priv, > > > > if (DISPLAY_VER(dev_priv) >= 11) { > > plane->min_width = icl_plane_min_width; > > - plane->max_width = icl_plane_max_width; > > + if (icl_is_hdr_plane(dev_priv, plane_id)) > > + plane->max_width = icl_plane_max_width_hdr; > > + else > > + plane->max_width = icl_plane_max_width_sdr; > > plane->max_height = icl_plane_max_height; > > plane->min_cdclk = icl_plane_min_cdclk; > > } else if (DISPLAY_VER(dev_priv) >= 10) { > > -- > > 2.33.0 > > -- > Ville Syrjälä > Intel
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 28890876bdeb..d320a3ba1ade 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -420,7 +420,17 @@ static int icl_plane_min_width(const struct drm_framebuffer *fb, } } -static int icl_plane_max_width(const struct drm_framebuffer *fb, +static int icl_plane_max_width_hdr(const struct drm_framebuffer *fb, + int color_plane, + unsigned int rotation) +{ + if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) + return 4096; + else + return 5120; +} + +static int icl_plane_max_width_sdr(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation) { @@ -2108,7 +2118,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, if (DISPLAY_VER(dev_priv) >= 11) { plane->min_width = icl_plane_min_width; - plane->max_width = icl_plane_max_width; + if (icl_is_hdr_plane(dev_priv, plane_id)) + plane->max_width = icl_plane_max_width_hdr; + else + plane->max_width = icl_plane_max_width_sdr; plane->max_height = icl_plane_max_height; plane->min_cdclk = icl_plane_min_cdclk; } else if (DISPLAY_VER(dev_priv) >= 10) {