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[24.9.77.57]) by smtp.googlemail.com with ESMTPSA id c18sm1843446iod.18.2022.01.06.21.29.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jan 2022 21:29:58 -0800 (PST) From: Jim Cromie To: jbaron@akamai.com, gregkh@linuxfoundation.org, linux@rasmusvillemoes.dk, rostedt@goodmis.org, mathieu.desnoyers@efficios.com, daniel.vetter@ffwll.ch, seanpaul@chromium.org, robdclark@gmail.com, dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Date: Thu, 6 Jan 2022 22:29:30 -0700 Message-Id: <20220107052942.1349447-8-jim.cromie@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220107052942.1349447-1-jim.cromie@gmail.com> References: <20220107052942.1349447-1-jim.cromie@gmail.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v11 07/19] drm_print: condense enum drm_debug_category X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: quic_saipraka@quicinc.com, arnd@arndb.de, jim.cromie@gmail.com, catalin.marinas@arm.com, linux-arm-msm@vger.kernel.org, mingo@redhat.com, quic_psodagud@quicinc.com, maz@kernel.org, will@kernel.org, linux-arm-kernel@lists.infradead.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" enum drm_debug_category has 10 hardcoded values, which could be "simplified" as sequential BIT(x)s. But lets take it one step further, removing the explicit initializations (other than starting at 1), and move the BIT() operation into drm_debug_enabled(). This gives us a more compact representation (4 bits), without loss of info; all DRM.debug api calls pass an enum parameter (and not a bit-OR of them), and the bitmask-iness of the enum's values is merely a micro-optimization to avoid doing BIT(category) at runtime. I doubt the extra bit-shift would be measurable here. And the 4-bit representation means it fits into struct _ddebug.class_id (commit:HEAD~1), setting up for further integration. The enum starts at 1, which respects the "reservation" of 0 as a special case; it is a non-category, and shouldn't get treated like one. Signed-off-by: Jim Cromie --- include/drm/drm_print.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h index 22fabdeed297..b4355bfd7888 100644 --- a/include/drm/drm_print.h +++ b/include/drm/drm_print.h @@ -279,49 +279,49 @@ enum drm_debug_category { * @DRM_UT_CORE: Used in the generic drm code: drm_ioctl.c, drm_mm.c, * drm_memory.c, ... */ - DRM_UT_CORE = 0x01, + DRM_UT_CORE = 1, /** * @DRM_UT_DRIVER: Used in the vendor specific part of the driver: i915, * radeon, ... macro. */ - DRM_UT_DRIVER = 0x02, + DRM_UT_DRIVER, /** * @DRM_UT_KMS: Used in the modesetting code. */ - DRM_UT_KMS = 0x04, + DRM_UT_KMS, /** * @DRM_UT_PRIME: Used in the prime code. */ - DRM_UT_PRIME = 0x08, + DRM_UT_PRIME, /** * @DRM_UT_ATOMIC: Used in the atomic code. */ - DRM_UT_ATOMIC = 0x10, + DRM_UT_ATOMIC, /** * @DRM_UT_VBL: Used for verbose debug message in the vblank code. */ - DRM_UT_VBL = 0x20, + DRM_UT_VBL, /** * @DRM_UT_STATE: Used for verbose atomic state debugging. */ - DRM_UT_STATE = 0x40, + DRM_UT_STATE, /** * @DRM_UT_LEASE: Used in the lease code. */ - DRM_UT_LEASE = 0x80, + DRM_UT_LEASE, /** * @DRM_UT_DP: Used in the DP code. */ - DRM_UT_DP = 0x100, + DRM_UT_DP, /** * @DRM_UT_DRMRES: Used in the drm managed resources code. */ - DRM_UT_DRMRES = 0x200, + DRM_UT_DRMRES }; static inline bool drm_debug_enabled(enum drm_debug_category category) { - return unlikely(__drm_debug & category); + return unlikely(__drm_debug & BIT(category)); } /*