Message ID | 20220118092354.11631-2-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: Fix bandwith related cdclk calculations | expand |
On Tue, Jan 18, 2022 at 11:23:40AM +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > skl_ddb_entry_init_from_hw() has no need for dev_priv. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 62fde21fac39..7185af0ff205 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4289,8 +4289,7 @@ skl_cursor_allocation(const struct intel_crtc_state *crtc_state, > return max(num_active == 1 ? 32 : 8, min_ddb_alloc); > } > > -static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv, > - struct skl_ddb_entry *entry, u32 reg) > +static void skl_ddb_entry_init_from_hw(struct skl_ddb_entry *entry, u32 reg) > { > entry->start = REG_FIELD_GET(PLANE_BUF_START_MASK, reg); > entry->end = REG_FIELD_GET(PLANE_BUF_END_MASK, reg); > @@ -4311,7 +4310,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv, > /* Cursor doesn't support NV12/planar, so no extra calculation needed */ > if (plane_id == PLANE_CURSOR) { > val = intel_uncore_read(&dev_priv->uncore, CUR_BUF_CFG(pipe)); > - skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val); > + skl_ddb_entry_init_from_hw(ddb_y, val); > return; > } > > @@ -4325,7 +4324,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv, > > if (DISPLAY_VER(dev_priv) >= 11) { > val = intel_uncore_read(&dev_priv->uncore, PLANE_BUF_CFG(pipe, plane_id)); > - skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val); > + skl_ddb_entry_init_from_hw(ddb_y, val); > } else { > val = intel_uncore_read(&dev_priv->uncore, PLANE_BUF_CFG(pipe, plane_id)); > val2 = intel_uncore_read(&dev_priv->uncore, PLANE_NV12_BUF_CFG(pipe, plane_id)); > @@ -4334,8 +4333,8 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv, > drm_format_info_is_yuv_semiplanar(drm_format_info(fourcc))) > swap(val, val2); > > - skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val); > - skl_ddb_entry_init_from_hw(dev_priv, ddb_uv, val2); > + skl_ddb_entry_init_from_hw(ddb_y, val); > + skl_ddb_entry_init_from_hw(ddb_uv, val2); > } > } > > -- > 2.32.0 >
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 62fde21fac39..7185af0ff205 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4289,8 +4289,7 @@ skl_cursor_allocation(const struct intel_crtc_state *crtc_state, return max(num_active == 1 ? 32 : 8, min_ddb_alloc); } -static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv, - struct skl_ddb_entry *entry, u32 reg) +static void skl_ddb_entry_init_from_hw(struct skl_ddb_entry *entry, u32 reg) { entry->start = REG_FIELD_GET(PLANE_BUF_START_MASK, reg); entry->end = REG_FIELD_GET(PLANE_BUF_END_MASK, reg); @@ -4311,7 +4310,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv, /* Cursor doesn't support NV12/planar, so no extra calculation needed */ if (plane_id == PLANE_CURSOR) { val = intel_uncore_read(&dev_priv->uncore, CUR_BUF_CFG(pipe)); - skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val); + skl_ddb_entry_init_from_hw(ddb_y, val); return; } @@ -4325,7 +4324,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv, if (DISPLAY_VER(dev_priv) >= 11) { val = intel_uncore_read(&dev_priv->uncore, PLANE_BUF_CFG(pipe, plane_id)); - skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val); + skl_ddb_entry_init_from_hw(ddb_y, val); } else { val = intel_uncore_read(&dev_priv->uncore, PLANE_BUF_CFG(pipe, plane_id)); val2 = intel_uncore_read(&dev_priv->uncore, PLANE_NV12_BUF_CFG(pipe, plane_id)); @@ -4334,8 +4333,8 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv, drm_format_info_is_yuv_semiplanar(drm_format_info(fourcc))) swap(val, val2); - skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val); - skl_ddb_entry_init_from_hw(dev_priv, ddb_uv, val2); + skl_ddb_entry_init_from_hw(ddb_y, val); + skl_ddb_entry_init_from_hw(ddb_uv, val2); } }