diff mbox series

[v2] drm/i915/rpl-s: Add stepping info

Message ID 20220125001635.4004286-1-anusha.srivatsa@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2] drm/i915/rpl-s: Add stepping info | expand

Commit Message

Srivatsa, Anusha Jan. 25, 2022, 12:16 a.m. UTC
Add stepping-substepping info in
accordance to BSpec changes.
Though it looks weird, the revision ID
for the newer stepping is indeed backwards
and is in accordance to the spec.

v2: Rearrange the platforms in logical order (Matt)

Bspec: 53655
Cc: Roper, Matthew D <matthew.d.roper@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_step.c | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Matt Roper Jan. 25, 2022, 1:05 a.m. UTC | #1
On Mon, Jan 24, 2022 at 04:16:35PM -0800, Anusha Srivatsa wrote:
> Add stepping-substepping info in
> accordance to BSpec changes.
> Though it looks weird, the revision ID
> for the newer stepping is indeed backwards
> and is in accordance to the spec.
> 
> v2: Rearrange the platforms in logical order (Matt)
> 
> Bspec: 53655
> Cc: Roper, Matthew D <matthew.d.roper@intel.com>

Git tools like send-email get very confused when they try to parse
"Last, First" name ordering.  It's best to use "First Last" with no
comma to avoid problems.

> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_step.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
> index a4b16b9e2e55..be055eb0b610 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -122,6 +122,11 @@ static const struct intel_step_info dg2_g11_revid_step_tbl[] = {
>  	[0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
>  };
>  
> +static const struct intel_step_info adls_rpls_revids[] = {
> +	[0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 },
> +	[0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
> +};
> +
>  void intel_step_init(struct drm_i915_private *i915)
>  {
>  	const struct intel_step_info *revids = NULL;
> @@ -129,6 +134,7 @@ void intel_step_init(struct drm_i915_private *i915)
>  	int revid = INTEL_REVID(i915);
>  	struct intel_step_info step = {};
>  
> +

Unwanted extra line here, but we can just fix that up (and the cc line
above) while applying the patch.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

>  	if (IS_DG2_G10(i915)) {
>  		revids = dg2_g10_revid_step_tbl;
>  		size = ARRAY_SIZE(dg2_g10_revid_step_tbl);
> @@ -141,6 +147,9 @@ void intel_step_init(struct drm_i915_private *i915)
>  	} else if (IS_ALDERLAKE_P(i915)) {
>  		revids = adlp_revids;
>  		size = ARRAY_SIZE(adlp_revids);
> +	} else if (IS_ADLS_RPLS(i915)) {
> +                revids = adls_rpls_revids;
> +                size = ARRAY_SIZE(adls_rpls_revids);
>  	} else if (IS_ALDERLAKE_S(i915)) {
>  		revids = adls_revids;
>  		size = ARRAY_SIZE(adls_revids);
> -- 
> 2.25.1
>
Srivatsa, Anusha Jan. 25, 2022, 1:06 a.m. UTC | #2
> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@intel.com>
> Sent: Monday, January 24, 2022 5:06 PM
> To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [v2] drm/i915/rpl-s: Add stepping info
> 
> On Mon, Jan 24, 2022 at 04:16:35PM -0800, Anusha Srivatsa wrote:
> > Add stepping-substepping info in
> > accordance to BSpec changes.
> > Though it looks weird, the revision ID for the newer stepping is
> > indeed backwards and is in accordance to the spec.
> >
> > v2: Rearrange the platforms in logical order (Matt)
> >
> > Bspec: 53655
> > Cc: Roper, Matthew D <matthew.d.roper@intel.com>
> 
> Git tools like send-email get very confused when they try to parse "Last,
> First" name ordering.  It's best to use "First Last" with no comma to avoid
> problems.

Yeah, realized it immediately after hitting send :-/

> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_step.c | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_step.c
> > b/drivers/gpu/drm/i915/intel_step.c
> > index a4b16b9e2e55..be055eb0b610 100644
> > --- a/drivers/gpu/drm/i915/intel_step.c
> > +++ b/drivers/gpu/drm/i915/intel_step.c
> > @@ -122,6 +122,11 @@ static const struct intel_step_info
> dg2_g11_revid_step_tbl[] = {
> >  	[0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
> };
> >
> > +static const struct intel_step_info adls_rpls_revids[] = {
> > +	[0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 },
> > +	[0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
> };
> > +
> >  void intel_step_init(struct drm_i915_private *i915)  {
> >  	const struct intel_step_info *revids = NULL; @@ -129,6 +134,7 @@
> > void intel_step_init(struct drm_i915_private *i915)
> >  	int revid = INTEL_REVID(i915);
> >  	struct intel_step_info step = {};
> >
> > +
> 
> Unwanted extra line here, but we can just fix that up (and the cc line
> above) while applying the patch.
> 
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

Thanks!
Anusha
> >  	if (IS_DG2_G10(i915)) {
> >  		revids = dg2_g10_revid_step_tbl;
> >  		size = ARRAY_SIZE(dg2_g10_revid_step_tbl);
> > @@ -141,6 +147,9 @@ void intel_step_init(struct drm_i915_private *i915)
> >  	} else if (IS_ALDERLAKE_P(i915)) {
> >  		revids = adlp_revids;
> >  		size = ARRAY_SIZE(adlp_revids);
> > +	} else if (IS_ADLS_RPLS(i915)) {
> > +                revids = adls_rpls_revids;
> > +                size = ARRAY_SIZE(adls_rpls_revids);
> >  	} else if (IS_ALDERLAKE_S(i915)) {
> >  		revids = adls_revids;
> >  		size = ARRAY_SIZE(adls_revids);
> > --
> > 2.25.1
> >
> 
> --
> Matt Roper
> Graphics Software Engineer
> VTT-OSGC Platform Enablement
> Intel Corporation
> (916) 356-2795
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index a4b16b9e2e55..be055eb0b610 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -122,6 +122,11 @@  static const struct intel_step_info dg2_g11_revid_step_tbl[] = {
 	[0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
 };
 
+static const struct intel_step_info adls_rpls_revids[] = {
+	[0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 },
+	[0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
+};
+
 void intel_step_init(struct drm_i915_private *i915)
 {
 	const struct intel_step_info *revids = NULL;
@@ -129,6 +134,7 @@  void intel_step_init(struct drm_i915_private *i915)
 	int revid = INTEL_REVID(i915);
 	struct intel_step_info step = {};
 
+
 	if (IS_DG2_G10(i915)) {
 		revids = dg2_g10_revid_step_tbl;
 		size = ARRAY_SIZE(dg2_g10_revid_step_tbl);
@@ -141,6 +147,9 @@  void intel_step_init(struct drm_i915_private *i915)
 	} else if (IS_ALDERLAKE_P(i915)) {
 		revids = adlp_revids;
 		size = ARRAY_SIZE(adlp_revids);
+	} else if (IS_ADLS_RPLS(i915)) {
+                revids = adls_rpls_revids;
+                size = ARRAY_SIZE(adls_rpls_revids);
 	} else if (IS_ALDERLAKE_S(i915)) {
 		revids = adls_revids;
 		size = ARRAY_SIZE(adls_revids);