From patchwork Thu Feb 10 00:39:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Cheng X-Patchwork-Id: 12741081 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6B7C2C433F5 for ; Thu, 10 Feb 2022 00:39:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A2BB10E6F1; Thu, 10 Feb 2022 00:39:15 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 99C9E10E17A; Thu, 10 Feb 2022 00:39:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644453552; x=1675989552; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=o6HuYlnP32PX1lqgHE1fsvZCwjUKZXMxGSqa7+v9E8k=; b=kobVVpMubmdODEnbfoJVzeT9wGN+HHm43xaJljlPtdd7s2ZgcSS3n63D BEwxsQJrMZzefbY6exhW2hDPHpKEkwiKPaQEhbpd5ObaMJXdaMSVN9H+2 4oSIvSaTX2xZQS5rFUW9jXz1MEAll9zxNU0/llCkqym+ZtytS4DAuF8lm Z/Voi3Cqjb1Sg3hkdtncI4tDr3GwY6g1UqbmtrMc3sTMaTf7aCA2mskKR HZ0MjR8kYqel7wQ+7pMhaJXsfgsGblo9cgMgdv446rVTqJbSNmWcSnSHu egtQyBWZXmqgvcEbeRPFRsYujZJ/O89A7V6gY9WIBiDiKfhlOb+fsO00X w==; X-IronPort-AV: E=McAfee;i="6200,9189,10253"; a="230023283" X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="230023283" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 16:39:12 -0800 X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="482544769" Received: from sroy1-mobl.amr.corp.intel.com (HELO mvcheng-desk2.intel.com) ([10.209.85.186]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 16:39:12 -0800 From: Michael Cheng To: intel-gfx@lists.freedesktop.org Date: Wed, 9 Feb 2022 16:39:03 -0800 Message-Id: <20220210003904.1055898-6-michael.cheng@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220210003904.1055898-1-michael.cheng@intel.com> References: <20220210003904.1055898-1-michael.cheng@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v8 5/6] drm/i915/: Re-work clflush_write32 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: michael.cheng@intel.com, lucas.demarchi@intel.com, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use drm_clflush_virt_range instead of clflushopt and remove the memory barrier, since drm_clflush_virt_range takes care of that. Signed-off-by: Michael Cheng --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 498b458fd784..0854276ff7ba 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -1332,10 +1332,8 @@ static void *reloc_vaddr(struct i915_vma *vma, static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) { if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) { - if (flushes & CLFLUSH_BEFORE) { - clflushopt(addr); - mb(); - } + if (flushes & CLFLUSH_BEFORE) + drm_clflush_virt_range(addr, sizeof(addr)); *addr = value; @@ -1347,7 +1345,7 @@ static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) * to ensure ordering of clflush wrt to the system. */ if (flushes & CLFLUSH_AFTER) - clflushopt(addr); + drm_clflush_virt_range(addr, sizeof(addr)); } else *addr = value; }