| Message ID | 20220216154711.3329667-2-jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] drm/i915/dsi: disassociate VBT video transfer mode from register values | expand |
On Wed, Feb 16, 2022 at 05:47:09PM +0200, Jani Nikula wrote: > Having a separate definition will be useful for splitting VLV and ICL > register files. > > Cc: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/display/icl_dsi.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 1 + > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c > index 479d5e1165d9..3c01565e62b2 100644 > --- a/drivers/gpu/drm/i915/display/icl_dsi.c > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c > @@ -570,7 +570,7 @@ gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder, > /* Program T-INIT master registers */ > for_each_dsi_port(port, intel_dsi->ports) { > tmp = intel_de_read(dev_priv, ICL_DSI_T_INIT_MASTER(port)); > - tmp &= ~MASTER_INIT_TIMER_MASK; > + tmp &= ~DSI_T_INIT_MASTER_MASK; > tmp |= intel_dsi->init_count; > intel_de_write(dev_priv, ICL_DSI_T_INIT_MASTER(port), tmp); > } > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 4ea1713e6b60..5646c843fd0d 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -9204,6 +9204,7 @@ enum skl_power_gate { > #define ICL_DSI_T_INIT_MASTER(port) _MMIO_PORT(port, \ > _ICL_DSI_T_INIT_MASTER_0,\ > _ICL_DSI_T_INIT_MASTER_1) > +#define DSI_T_INIT_MASTER_MASK REG_GENMASK(15, 0) > > #define _DPHY_CLK_TIMING_PARAM_0 0x162180 > #define _DPHY_CLK_TIMING_PARAM_1 0x6c180 > -- > 2.30.2 >
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 479d5e1165d9..3c01565e62b2 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -570,7 +570,7 @@ gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder, /* Program T-INIT master registers */ for_each_dsi_port(port, intel_dsi->ports) { tmp = intel_de_read(dev_priv, ICL_DSI_T_INIT_MASTER(port)); - tmp &= ~MASTER_INIT_TIMER_MASK; + tmp &= ~DSI_T_INIT_MASTER_MASK; tmp |= intel_dsi->init_count; intel_de_write(dev_priv, ICL_DSI_T_INIT_MASTER(port), tmp); } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4ea1713e6b60..5646c843fd0d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -9204,6 +9204,7 @@ enum skl_power_gate { #define ICL_DSI_T_INIT_MASTER(port) _MMIO_PORT(port, \ _ICL_DSI_T_INIT_MASTER_0,\ _ICL_DSI_T_INIT_MASTER_1) +#define DSI_T_INIT_MASTER_MASK REG_GENMASK(15, 0) #define _DPHY_CLK_TIMING_PARAM_0 0x162180 #define _DPHY_CLK_TIMING_PARAM_1 0x6c180
Having a separate definition will be useful for splitting VLV and ICL register files. Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/icl_dsi.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-)