| Message ID | 20220301231549.1817978-10-matthew.d.roper@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | i915: Prepare for Xe_HP compute engines | expand |
On 3/1/2022 3:15 PM, Matt Roper wrote: > From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > Tell GuC that CCS is enabled by setting a bit in its ADS. It's a mask, not a bit. Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Daniele > > Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > Original-author: Michel Thierry > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > index 29fbe4681ca7..9bb551b83e7a 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > @@ -434,6 +434,7 @@ static void fill_engine_enable_masks(struct intel_gt *gt, > struct iosys_map *info_map) > { > info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], 1); > + info_map_write(info_map, engine_enabled_masks[GUC_COMPUTE_CLASS], CCS_MASK(gt)); > info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], 1); > info_map_write(info_map, engine_enabled_masks[GUC_VIDEO_CLASS], VDBOX_MASK(gt)); > info_map_write(info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS], VEBOX_MASK(gt));
On Tue, Mar 01, 2022 at 03:15:45PM -0800, Matt Roper wrote: > From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > Tell GuC that CCS is enabled by setting a bit in its ADS. > > Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > Original-author: Michel Thierry > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > index 29fbe4681ca7..9bb551b83e7a 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > @@ -434,6 +434,7 @@ static void fill_engine_enable_masks(struct intel_gt *gt, > struct iosys_map *info_map) > { > info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], 1); > + info_map_write(info_map, engine_enabled_masks[GUC_COMPUTE_CLASS], CCS_MASK(gt)); > info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], 1); > info_map_write(info_map, engine_enabled_masks[GUC_VIDEO_CLASS], VDBOX_MASK(gt)); > info_map_write(info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS], VEBOX_MASK(gt)); > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c index 29fbe4681ca7..9bb551b83e7a 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c @@ -434,6 +434,7 @@ static void fill_engine_enable_masks(struct intel_gt *gt, struct iosys_map *info_map) { info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], 1); + info_map_write(info_map, engine_enabled_masks[GUC_COMPUTE_CLASS], CCS_MASK(gt)); info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], 1); info_map_write(info_map, engine_enabled_masks[GUC_VIDEO_CLASS], VDBOX_MASK(gt)); info_map_write(info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS], VEBOX_MASK(gt));